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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Konighofer, R. Hofferek, G. Bloem, R. |
| Copyright Year | 2009 |
| Description | Author affiliation: Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology (Konighofer, R.; Hofferek, G.; Bloem, R.) |
| Abstract | Deriving a formal specification from an informal design intent is an error-prone process. The resulting specification may be incomplete, unrealizable, or in conflict with the design intent. We propose a debugging method for incorrect specifications that does not need an implementation. We show that we can explain conflicts with the design intent by explaining unrealizability. Our approach for explaining unrealizability is based on counterstrategies. Since counterstrategies may be large, we propose several ways to simplify them. First, we simplify the specification itself by removing both requirements and variables that do not contribute to the problem. Second, we heuristically search for a countertrace, i.e., a single input trace that suffices to demonstrate unrealizability. Finally, we present the countertrace or the counterstrategy to the user in extensive form as a graph and implicitly as an interactive game. We present experimental results for specifications given as GR(1) formulas. |
| Starting Page | 152 |
| Ending Page | 159 |
| File Size | 214335 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781424449668 |
| DOI | 10.1109/FMCAD.2009.5351127 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-11-15 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Design engineering Protocols Debugging Information processing Computer errors Safety Formal specifications |
| Content Type | Text |
| Resource Type | Article |
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