NDLI: Hierarchical diagnosis of sequential circuits

Content Provider	IEEE Xplore Digital Library
Author	Bond, G.W. Pagurek, B.
Copyright Year	1995
Description	Author affiliation: Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC, Canada (Bond, G.W.)
Abstract	This paper is concerned with automated diagnosis of sequential logic circuits, where we define the task of diagnosis to be the identification of (minimal) sets of circuit components which account for observed circuit misbehavior. We also discuss test generation for distinguishing between several possible candidate diagnoses. Our particular approach to diagnosis, an instance of consistency-based diagnosis, requires no information concerning the possible modes or probabilities of component failure such as stuck-at faults or MTBF data, respectively. The approach computes diagnoses utilizing only a set of observations of actual circuit behavior and a model of specified circuit structure and behavior. This latter model is nothing more than a logic program (i.e. a pure Prolog program or constraint logic program) satisfying certain ontological constraints.
Starting Page	1813
Ending Page	1818
File Size	669234
Page Count	6
File Format	PDF
ISBN	0780325591
DOI	10.1109/ICSMC.1995.538038
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-10-22
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Sequential circuits Circuit faults Fault diagnosis Logic circuits Adders Clocks Bonding Circuit testing Integrated circuit interconnections Feedback circuits
Content Type	Text
Resource Type	Article

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