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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Morgado, A. del Rio, R. de la Rosa, J.M. |
| Copyright Year | 2010 |
| Description | Author affiliation: Institute de Microelectrónica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla) C/Américo Vespucio s/n, 41092 Sevilla, Spain (Morgado, A.; del Rio, R.; de la Rosa, J.M.) |
| Abstract | This paper discusses practical design issues associated to the implementation of ΣΔ analog-to-digital converters intended for mobile telecom applications. After a comprehensive description of the proposed adaptive resonation-based Sturdy MASH ΣΔ modulator, architectural and circuit-level timing limitations are analysed in detail, showing different design trade-offs. As a result of this analysis, a novel time-saving implementation of the dynamic element matching required in the multi-bit front-end digital-to-analog converter is presented. The circuit solutions found can be applied to SC reconfigurable implementations operating up to 320-MHz sampling frequencies. In order to demonstrate the capabilities of the considered modulator, a case study covering a number of standards, including GSM, Bluetooth, UMTS, DVB-H, WiMax and WLAN is shown. Time-domain behavioural simulations including main circuit-level errors validate the presented $study^{†1}$ |
| Starting Page | 357 |
| Ending Page | 360 |
| File Size | 2043516 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424468065 |
| e-ISBN | 9781424468058 |
| e-ISBN | 9781424468041 |
| DOI | 10.1109/NEWCAS.2010.5604014 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-06-20 |
| Publisher Place | Canada |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Content Type | Text |
| Resource Type | Article |
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