NDLI: Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures

Content Provider	IEEE Xplore Digital Library
Author	Veljkovic, F. Riesgo, T. de la Torre, E.
Copyright Year	2015
Description	Author affiliation: Center of Ind. Electron. - CEI, Univ. Politec. de Madrid, Madrid, Spain (Veljkovic, F.; Riesgo, T.; de la Torre, E.)
Abstract	The impact of SRAM-based FPGAs is constantly growing in aerospace industry despite the fact that their volatile configuration memory is highly susceptible to radiation effects. Therefore, strong fault-handling mechanisms have to be developed in order to protect the design and make it capable of fighting against both soft and permanent errors. In this paper, a fully reconfigurable medium-grained triple modular redundancy (TMR) architecture which forms part of a runtime adaptive on-board processor (OBP) is presented. Fault mitigation is extended to the voting mechanism by applying our reconfiguration methodology not only to domain replicas but also to the voter itself. The proposed approach takes advantage of adaptive configuration placement and modular property of the OBP, thus allowing on-line creation of different medium-grained TMRs and selection of their granularity level. Consequently, we are able to narrow down the fault-affected area thus making the error recovery process faster and less power consuming. The conventional hardware based voting is supported by the ICAP-based one in order to additionally strengthen the reconfigurable intermediate voting. In addition, the implementation methodology ensures using only one memory footprint for all voters and their voting adaptations thus saving storing resources in expensive rad-hard memories.
Starting Page	1
Ending Page	8
File Size	866758
Page Count	8
File Format	PDF
e-ISBN	9781467375016
DOI	10.1109/AHS.2015.7231165
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-15
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Tunneling magnetoresistance Fault tolerant systems Redundancy Runtime Circuit faults Field programmable gate arrays soft and permanent errors TMR voting ICAP-based voting medium-grained TMR scalable partial reconfiguration gcapture on-board processor fully reconfigurable TMR TMR with spare adaptive voter
Content Type	Text
Resource Type	Article

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