NDLI: Multiprocessor System-on-Chip Design with Fuzzy Dynamic Scheduling for Parallel Video Processing

Content Provider	IEEE Xplore Digital Library
Author	Li, Da Hou, Yibin Huang, Zhangqin Xiao, Chunhua
Copyright Year	2011
Abstract	The Multiprocessor System-on-Chip is becoming a promising solution for the future complex computers and embedded systems, which are requiring higher performances. This paper addresses the inherent unreliability and instability of the multiple uncertain characteristics of complex embedded multiprocessor systems. In this work, we propose a fuzzy sets description for the multiple uncertain characteristics of system, and using fuzzy set membership calculation to determine the scheduling priorities of tasks and resources, in order to improve the capability of concurrent executions of tasks. And also we present a method estimation of comprehensive analysis on the multiple performances in order to increase utilization factor and balancing loads on processors. We implemented a prototype MPSoC system design, which utilizes the proposed fuzzy dynamic scheduling algorithm to allocating tasks onto the multiprocessors. And in our case study, we design a parallel architecture h.264 encoder, running on a multicore MPSoC system on FPGA.
Starting Page	65
Ending Page	70
File Size	594512
Page Count	6
File Format	PDF
ISBN	9781457701412
DOI	10.1109/ICIS.2011.19
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-05-16
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Program processors Processor scheduling Fuzzy sets Strontium Heuristic algorithms Dynamic scheduling Parallel Computing MPSoC System Dynamic Scheduling Multi-characteristics Fuzzy Set Video Processing
Content Type	Text
Resource Type	Article

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