NDLI: Building Dependable Intrusion Prevention Systems

Content Provider	IEEE Xplore Digital Library
Author	Botwicz, J. Buciak, P. Sapiecha, P.
Copyright Year	2006
Description	Author affiliation: Dept. of Electron. & Inf. Technol., Warsaw Univ. of Technol. (Botwicz, J.; Buciak, P.; Sapiecha, P.)
Abstract	Intrusion prevention systems (IPSs) have become widely recognized as a powerful tool and an important element of IT security safeguards. Essential to every network intrusion prevention system is the ability to search through packets and identify patterns that match known attacks. Resource- and time-efficient string matching algorithms are therefore important for identifying these packets at the line rate. Recently these systems have become a target of attacks - the example is the infamous Witty worm. The devices which use algorithms with low worst-case performance could be a target of algorithmic complexity attacks. For example, poorly prepared hash tables can degenerate to linked lists with carefully chosen input. An attacker can effectively compute an input data that will diminish the device throughput. This can lead to denial of service attacks, which are very dangerous for networks and computational environments. In this article new hardware implementation architecture of the Karp-Rabin algorithm was introduced. The result is a software, which generates a pattern matching module that could be easily used to create intrusion prevention systems implemented in reconfigurable hardware. The prepared module matches the subset of the Snort IPS signatures achieving throughput of over 2 Gbps and have the worst-case performance similar to the best-case one. This means that the presented implementation architecture is immune to algorithmic complexity attacks
Starting Page	135
Ending Page	142
File Size	524976
Page Count	8
File Format	PDF
ISBN	0769525652
DOI	10.1109/DEPCOS-RELCOMEX.2006.10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-25
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Intrusion detection Pattern matching Throughput Computer crime Computer networks Hardware Telecommunication traffic Computer architecture Databases Engines
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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