NDLI: An Application-Oriented Virtual Microsensor Integration Platform

Content Provider	IEEE Xplore Digital Library
Author	Hongtao Du Hairong Qi Bouldin, D.W.
Copyright Year	2006
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Tennessee Univ., Knoxville, TN (Hongtao Du; Hairong Qi; Bouldin, D.W.)
Abstract	The availabilities of low-cost microsensors and wireless communication networks have extended the applications of sensor network into a broad spectrum. Currently available microsensor nodes such as Mote from Crossbow and sGate from Sensoria integrate many 1-D sensing devices and processing on one platform. However, 1-D signal in most time can not provide sufficient information for monitoring or detection purpose. Visual sensor network (VSN) that is a network including visual sensors provide an approach for 2-D signal demand. But the requirement of huge communication bandwidth, together with high power consumption, brings new challenges to real implementation. The ideal solution to these problems is system integration for on-site image processing. In this paper, we propose an image processing oriented virtual microsensor platform and target at system-on-chip (SoC) with embedded FPGA. The virtual microsensor platform does not provide a final microsensor but a design environment where a set of image processing intellectual property (IP) blocks can be selected with pre-defined metrics. The user-specified design is then integrated with pre-defined architectures, therefore meeting performance requirements of low power, high density, and sufficient processing capabilities at the same time. The IP library consisting of image pre-processing and processing blocks is the focal point of the virtual microsensor platform. Each IP block addresses earlier validation of various applications in both regular and faulty conditions. This paper presents the IP designs of polynomial approximation based geometric correction and independent component analysis (ICA) as pre-processing and processing examples. Several testbeds are also compared for prototyping and implementing the designs generated from the virtual microsensor platform
Sponsorship	IEEE SYSTEMS, MAN AND CYBERNETICS SOC
Starting Page	874
Ending Page	879
File Size	382524
Page Count	6
File Format	PDF
ISBN	1424400651
DOI	10.1109/ICNSC.2006.1673262
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-04-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Microsensors Image processing Independent component analysis Wireless communication Wireless sensor networks Monitoring Bandwidth Energy consumption System-on-a-chip Field programmable gate arrays
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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