NDLI: A regular expression matching using non-deterministic finite automaton

Content Provider	IEEE Xplore Digital Library
Author	Nakahara, H. Sasao, T. Matsuura, M.
Copyright Year	2010
Description	Author affiliation: Kyushu Institute of Technology, Iizuka, Japan (Nakahara, H.; Sasao, T.; Matsuura, M.)
Abstract	This paper shows an implementation of CANSCID (Combined Architecture for Stream Categorization and Intrusion Detection). To satisfy the required system throughput, the packet assembler and the regular expression matching are implemented by the dedicated hardware. On the other hand, the counting of matching results and the system control are implemented by a microprocessor. A regular expression matching circuit is performed as follows: First, the given regular expressions are converted into a non-deterministic finite automaton (NFA). Then, to reduce the number of states, the NFA is converted to a modular non-deterministic finite automaton (MNFA(p)) with p-character-consuming transition. Finally, a finite-input memory machine (FIMM) to detect p-characters is generated, and the matching elements (MEs) realizing the states for the MNFA(p) are generated. We loaded 140 regular expressions of the MEMOCODE 2010 design contest on Terasic Corp. DE3 prototyping board (FPGA: Altera's Stratix III). The maximum throughput of our implementation was 798 mega bits per second (Mbps).
Starting Page	73
Ending Page	76
File Size	913483
Page Count	4
File Format	PDF
ISBN	9781424478859
e-ISBN	9781424478866
DOI	10.1109/MEMCOD.2010.5558621
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-07-26
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer aided manufacturing Indexes Field programmable gate arrays Automata Intrusion detection Throughput Finite element methods
Content Type	Text
Resource Type	Article

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