NDLI: A digital beamforming processor for the joint DoD/NASA space based radar mission

Content Provider	IEEE Xplore Digital Library
Author	Fischman, M.A. Le, C. Rosen, P.A.
Copyright Year	2004
Description	Author affiliation: Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA (Fischman, M.A.; Le, C.; Rosen, P.A.)
Abstract	The space based radar (SBR) program includes a joint technology demonstration between NASA and the Air Force to design a low-earth orbiting, 2/spl times/50 m L-band (1.26 GHz) radar system for both Earth science and intelligence-related observations. A key subsystem aboard SBR is the electronically-steerable digital beamformer (DBF) network that interfaces between 32 smaller sub-antenna panels in the array and the on-board processing electronics for synthetic aperture radar (SAR) and moving target indication (MTI). In this paper, we describe the development of a field-programmable gate array (FPGA) based DBF processor for handling the algorithmically simple yet computationally intensive inner-product operations for wideband, coherent beamforming across the 50 m length of the array. Tests with an antenna array simulator demonstrate that the beamformer performance metrics (0.07/spl deg/ rms phase precision per channel, -39.0 dB peak sidelobe level) will meet the system-level requirements for SAR and MTI operating modes.
Sponsorship	IEEE Philadelphia Section IEEE Aerospace and Electon. Syst. Soc. Lockheed Martin MS2 BAE Syst. Johns Hopkins Univ. Appl. Phys. Laboratory JTAN Lambda Sci. Inc
Starting Page	9
Ending Page	14
File Size	610552
Page Count	6
File Format	PDF
ISBN	078038234X
DOI	10.1109/NRC.2004.1316387
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-04-29
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Array signal processing NASA Spaceborne radar Field programmable gate arrays Phased arrays Space technology L-band Geoscience Synthetic aperture radar Wideband
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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