NDLI: A power-efficient circuit design of feed-forward FxLMS active noise cancellation for in-ear headphones

Content Provider	IEEE Xplore Digital Library
Author	Hong-Son Vu Kuan-Hung Chen Shih-Feng Sun Tien-Mau Fong Che-Wei Hsu Lei Wang
Copyright Year	2015
Description	Author affiliation: Dept. of Electron. Eng., Feng Chia Univ., Taichung, Taiwan (Kuan-Hung Chen; Tien-Mau Fong; Che-Wei Hsu) \|\| Dept. of Electr. Eng., Feng Chia Univ., Taichung, Taiwan (Shih-Feng Sun; Lei Wang) \|\| Electr. & Commun. Eng., Feng Chia Univ., Taichung, Taiwan (Hong-Son Vu)
Abstract	Conventional active noise cancelling (ANC) headphones perform well in reducing the low-frequency noise and isolate high-frequency noise by earmuffs passively. These systems often use high-speed digital signal processors (DSPs) to cancel out the disturbing noise at such low frequencies, which result in a high-power dissipation for a commercial ANC headphone. This paper proposes a high-performance feedforward ANC architecture and implements a high-performance low power circuit design accordingly based on the filtered-x least mean square (FxLMS) adaptive algorithm. Experimental results show that the proposed high-performance circuit design can reduce disturbing noise of various frequency bands very well, and outperforms the existing works. After fabricating by using the TSMC 90nm CMOS technology, the proposed design can attenuate 15 dB for the broadband pink noise between 50-1500 Hz when operated at 10 MHz clock frequency at the costs of 84.2 k gates and power consumption of 6.42 mW only.
Starting Page	1
Ending Page	4
File Size	689236
Page Count	4
File Format	PDF
ISBN	9781479962754
DOI	10.1109/VLSI-DAT.2015.7114524
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-04-27
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Headphones Adaptive filters Filtering algorithms Broadband communication Circuit synthesis Noise cancellation VLSI design active noise cancellation FxLMS hardware architecture in-ear headphone
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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