NDLI: Automatic Energy Status Controlling with Dynamic Voltage Scaling in Power-Aware High Performance Computing Cluster

Content Provider	IEEE Xplore Digital Library
Author	Yuansheng Cheng Yu Zeng
Copyright Year	2011
Abstract	Recently, more and more people are focused on the energy efficiency of HPC(High Performance Computing) centers. The power consumption of supercomputer listed in the first 10 of top 500 is usually more than 1Mkw. Power-aware techniques have been widely used in data centre or supercomputer centre for reducing the power consumption. It is useful for us to reduce the power consumption with frequency scalable CPU being adopted in the HPC centers. Because load unbalance is a common problem in high performance computing, we can gear the frequency of CPU down when it is idle so that the power consumption can be reduced with little performance lose. In this paper, we present a new method called AESC(Automatic Energy Status Controlling) which can control the energy status of CPU automatically. Firstly, we identify the application as different kinds of power consumption by the load balancing and communication time. Secondly, we will give a control policy for controlling the energy status based on former results. By using this policy, we can automatically gear the frequency of CPU and get the best result that 20% less energy while increasing execution time by only 1%.
Starting Page	412
Ending Page	416
File Size	287547
Page Count	5
File Format	PDF
ISBN	9781457718076
DOI	10.1109/PDCAT.2011.24
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-20
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Power demand Energy consumption Frequency control Time frequency analysis Voltage control Mobile communication Computers Energy Status Controlling Power-aware DVS
Content Type	Text
Resource Type	Article

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