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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Navarro, J.A. |
| Copyright Year | 2005 |
| Description | Author affiliation: Boeing-Phantom Works, USA (Navarro, J.A.) |
| Abstract | In recent years, improvements in material types, fabrication processes and manufacturing technologies has allowed the combination of various functions within single, scalable, photolithographically fabricated components. Sometimes referred to as heterogeneous integration or system on a chip, these approaches combine analog devices, digital circuits and antennas to increase system performance and functionality while reducing the size and cost of individual components. These approaches combine RF amplification, power generation, phase and amplitude manipulation, filtering, up and down-conversion and function generation on a common substrate using similar fabrication processes. Such combinations along with the use of planar transmission media, efficient design and analysis tools and miniaturized antennas have resulted in a wide range of low-profile, conformal and integrated system solutions. Single-chip transceiver solutions have already opened up a wide range of applications including wireless communications, remote sensors and low-cost radar. A recent government BAA 05-27, "scalable millimeter-wave architectures for reconfigurable transceivers (SMART)" seeks to continue this type of development at Q-band and above. Thermal, mechanical and electrical packaging considerations determine the level of integration needed to succeed in these on-going efforts. Heterogeneous integration deals with the various trade-offs encountered when combining guided-wave media and antennas. These trade-offs include circuit isolation, Q-factors and radiator field of view, polarization purity and radiation efficiency. The performance of one component versus another is often compromised through either process selection, material types or because of dimensional constraints. These trades come about because of competing, often contradictory, requirements of guided media and radiators. This paper discusses the various packaging constraints encountered during this level of function integration. |
| File Size | 472199 |
| File Format | |
| ISBN | 0780392507 |
| DOI | 10.1109/CSICS.2005.1531761 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-10-30 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Apertures Fabrication Power generation Transceivers Packaging Manufacturing processes Digital circuits Antenna accessories System performance Cost function |
| Content Type | Text |
| Resource Type | Article |
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