NDLI: Robust Filtering Circuit Design for Gene Networks under Intrinsic and Extrinsic Molecular Noises

Content Provider	IEEE Xplore Digital Library
Author	Chen, B.S. Wu, W.S.
Copyright Year	2006
Description	Author affiliation: Nat. Tsing Hua Univ., Hsinchu (Chen, B.S.; Wu, W.S.)
Abstract	How to design a robust gene network to tolerate intrinsic kinetic parameter variations and to attenuate extrinsic environmental noises to a desired altering level will be an important topic in metabolic engineering for biotechnological purpose or drug design for therapeutic purpose. At present, there is still no good systematic design method to achieve the robust gene network design. In this study, a gene network suffering from intrinsic kinetic parameter fluctuations and extrinsic environmental noises is modeled as Langevin equation with state-dependent stochastic noises. Based on the nonlinear stochastic filtering theory, a systematic gene circuit design method is proposed to achieve robust stability to tolerate intrinsic noises and to attenuate extrinsic noises to a prescribed filtering level. Computational simulations of a gene network are performed to illustrate the systematic design procedure and to confirm the performance of the proposed robust filtering circuit design in gene networks. The robust gene network design principles have not only yielded a comprehensive design theory of robust gene networks, but also gained valuable insights into the molecular noise filtering of gene networks. The proposed design method could precede the experimental biotechnological method to allow objective numerical improvement strategies for robust gene circuit designs.
Starting Page	3590
Ending Page	3595
File Size	1540600
Page Count	6
File Format	PDF
ISBN	1424400996
DOI	10.1109/ICSMC.2006.384686
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-08
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Noise robustness Circuit synthesis Circuit noise Working environment noise Filtering theory Kinetic theory Design methodology Stochastic resonance Noise level Design engineering
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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