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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sehyuk Ann Jusang Park Junho Yu Namsoo Kim |
| Copyright Year | 2015 |
| Description | Author affiliation: Sch. of ECE, Chungbuk Nat. Univ., Cheong-ju, South Korea (Sehyuk Ann; Jusang Park; Junho Yu; Namsoo Kim) |
| Abstract | In this paper, a high performance frequency divider is introduced in an integrated CMOS phase-locked loop (PLL). An injection-locked frequency divider (ILFD) is designed with a current-mode logic (CML) frequency divider to obtain the broad-band and high frequency operation. LC cross-coupled oscillator operates at 50 GHz and ILFD is supposed to provide the operation of divide-by-2 (/2). ILFD has a similar structure with the oscillator to adjust the frequency alignment between the oscillator and ILFD. As the 2nd-stage divider, CML frequency divider is applied with an inductive peaking structure. The proposed frequency divider is applied in the conventional PLL which is integrated with 0.18 μm CMOS process. Simulation test shows that the /2 ILFD and /128 CML frequency divider is operated at the input frequency of 50 GHz with the power consumption of 30 mW. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 541931 |
| Page Count | 4 |
| File Format | |
| e-ISBN | 9781467365819 |
| DOI | 10.1109/SaPIW.2015.7237383 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-05-10 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Frequency conversion Voltage-controlled oscillators Phase locked loops Power demand MOSFET CMOS integrated circuits CMOS Frequency divider ILFD CML PLL |
| Content Type | Text |
| Resource Type | Article |
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