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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ahmad, M. Hijaz, F. Qingchuan Shi Khan, O. |
| Copyright Year | 2015 |
| Description | Author affiliation: Univ. of Connecticut, Storrs, CT, USA (Ahmad, M.; Hijaz, F.; Qingchuan Shi; Khan, O.) |
| Abstract | Algorithms operating on a graph setting are known to be highly irregular and unstructured. This leads to workload imbalance and data locality challenge when these algorithms are parallelized and executed on the evolving multicore processors. Previous parallel benchmark suites for shared memory multicores have focused on various workload domains, such as scientific, graphics, vision, financial and media processing. However, these suites lack graph applications that must be evaluated in the context of architectural design space exploration for futuristic multicores. This paper presents CRONO, a benchmark suite composed of multi-threaded graph algorithms for shared memory multicore processors. We analyze and characterize these benchmarks using a multicore simulator, as well as a real multicore machine setup. CRONO uses both synthetic and real world graphs. Our characterization shows that graph benchmarks are diverse and challenging in the context of scaling efficiency. They exhibit low locality due to unstructured memory access patterns, and incur fine-grain communication between threads. Energy overheads also occur due to nondeterministic memory and synchronization patterns on network connections. Our characterization reveals that these challenges remain in state-of-the-art graph algorithms, and in this context CRONO can be used to identify, analyze and develop novel architectural methods to mitigate their efficiency bottlenecks in futuristic multicore processors. |
| Starting Page | 44 |
| Ending Page | 55 |
| File Size | 611093 |
| Page Count | 12 |
| File Format | |
| e-ISBN | 9781509000883 |
| DOI | 10.1109/IISWC.2015.11 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-10-04 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Multicore processing Benchmark testing Instruction sets Scalability Data structures |
| Content Type | Text |
| Resource Type | Article |
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