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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Becchi, M. Franklin, M. Crowley, P. |
| Copyright Year | 2008 |
| Description | Author affiliation: Comput. Sci. & Eng. Dept., Washington Univ. in St. Louis, St. Louis, MO (Becchi, M.; Franklin, M.; Crowley, P.) |
| Abstract | High-speed content inspection of network traffic is an important new application area for programmable networking systems, and has recently led to several proposals for high-performance regular expression matching. At the same time, the number and complexity of the patterns present in well-known network intrusion detection systems has been rapidly increasing. This increase is important since both the practicality and the performance of specific pattern matching designs are strictly dependent upon characteristics of the underlying regular expression set. However, a commonly agreed upon workload for the evaluation of deep packet inspection architectures is still missing, leading to frequent unfair comparisons, and to designs lacking in generality or scalability. In this paper, we propose a workload for the evaluation of regular expression matching architectures. The workload includes a regular expression model and a traffic generator, with the former characterizing different levels of expressiveness within rule-sets and the latter characterizing varying degrees of malicious network activity. The proposed workload is used here to evaluate designs (e.g., different memory layouts and hardware organizations) where the matching algorithm is based on compressed deterministic and non deterministic finite automata (DFAs and NFAs). |
| Starting Page | 79 |
| Ending Page | 89 |
| File Size | 381009 |
| Page Count | 11 |
| File Format | |
| ISBN | 9781424427772 |
| DOI | 10.1109/IISWC.2008.4636093 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-09-14 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Doped fiber amplifiers Memory management Complexity theory Pattern matching Inspection Automata Bandwidth |
| Content Type | Text |
| Resource Type | Article |
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