NDLI: A flexible MAC development framework for cognitive radio systems

Content Provider	IEEE Xplore Digital Library
Author	Ansari, J. Xi Zhang Achtzehn, A. Petrova, M. Mahonen, P.
Copyright Year	2011
Description	Author affiliation: Institute for Networked Systems, RWTH Aachen University, Kackertstrasse 9, D-52072, Aachen, Germany (Ansari, J.; Xi Zhang; Achtzehn, A.; Petrova, M.; Mahonen, P.)
Abstract	Cognitive radios are becoming the technological foundation for efficiently managing the scarcity of wireless spectrum, fulfilling various QoS demands and allowing different networks to coexist. Cognition and spectrum agility in MAC protocols require adaptability and close PHY-MAC interaction. Classically, MAC protocols have been implemented in hardware, which gives a limited possibility for reconfiguration and customization. Recently, software based MAC implementations have emerged although a close hardware-software co-design is typically required to keep the time critical operations in ASICs or FPGAs. We introduce a MAC development framework for enabling fast composition of MAC protocols, which are best fitted to the application requirements, communication capabilities of the radio, and current spectrum regulations and policies. We decompose MAC protocols into their basic functionalities which are perceived as building blocks and are partitioned across hardware/software. Our framework allows on-the-fly realization of the envisioned MAC protocol through wiring of these fundamental components. By exposing extended metadata and hardware functionalities for the MAC implementation through our granular components, together with the support for run-time re-configuration, spectrum agile and cognitive MAC solutions can be easily realized. In this paper, we describe the design rationale and implementation details of our framework on WARP [1] boards. We show through experimental evaluation that the framework provides flexible means for prototyping different reconfigurable cognitive and spectrum agile MAC protocols.
Starting Page	156
Ending Page	161
File Size	1183796
Page Count	6
File Format	PDF
ISBN	9781612842554
ISSN	15253511
e-ISBN	9781612842547
DOI	10.1109/WCNC.2011.5779123
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-03-28
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Media Access Protocol Hardware Wiring Engines Software Time factors
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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