NDLI: Low-power driven logic synthesis using accurate power estimation technique

Content Provider	IEEE Xplore Digital Library
Author	Patil, P. Chou, T.-L. Roy, K. Roy, R.
Copyright Year	1997
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA (Patil, P.)
Abstract	With the increasing use of portable computing and wireless communication systems, the power dissipation of very large scale integrated (VLSI) circuits is becoming a critical concern. Towards this end we introduce algebraic procedures for node extraction and factorization that target low power consumption in combinational logic circuits. A new cost function is also proposed for the sum-of-products representation of the expressions. This cost function is used to guide the power optimization procedures. The spatial and temporal correlations of signals were taken into account to gain accurate power estimation. The results show that an average of 10% saving was gained in power using logic synthesis with the proposed accurate power estimation technique, compared to area optimized designs. Results also show that the power dissipation of the circuit, synthesized assuming temporally uncorrelated primary inputs, can dissipate 75% more power than that of the circuits assuming temporally correlated inputs.
Starting Page	179
Ending Page	184
File Size	606857
Page Count	6
File Format	PDF
ISBN	0818677554
ISSN	10639667
DOI	10.1109/ICVD.1997.568073
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-01-04
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic Power dissipation Very large scale integration Cost function Circuit synthesis Signal synthesis Integrated circuit synthesis Portable computers Wireless communication Energy consumption
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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