NDLI: Low-cost gate-oxide early-life failure detection in robust systems

Content Provider	IEEE Xplore Digital Library
Author	Young Moon Kim Kameda, Y. Hyunki Kim Mizuno, M. Mitra, S.
Copyright Year	2010
Description	Author affiliation: NEC Corporation, Japan (Kameda, Y.; Mizuno, M.) \|\| Electrical Engineering, Korea (Young Moon Kim; Hyunki Kim; Mitra, S.)
Abstract	We present a new low-cost technique for detecting gate-oxide early-life failures (ELF) to overcome reliability challenges in robust systems without requiring expensive concurrent error detection. Our approach is enabled by an on-chip clock control technique, applied during periodic on-line self-test and diagnostics, to detect delay shifts over time before functional failures occur. Using 90nm test chips, we demonstrate the following key results: 1. A gate-oxide ELF transistor inside a combinational logic circuit results in delay shifts over time before functional failures appear. 2. The delay shifts can be successfully detected during on-line self-test and diagnostics using our on-chip clock control technique.
Starting Page	125
Ending Page	126
File Size	163096
Page Count	2
File Format	PDF
ISBN	9781424454549
e-ISBN	9781424454532
DOI	10.1109/VLSIC.2010.5560326
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-06-16
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Logic gates Geophysical measurement techniques Ground penetrating radar Clocks Stress System-on-a-chip
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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