NDLI: A list sphere decoder based turbo receiver for groupwise space time trellis coded (GSTTC) systems

Content Provider	IEEE Xplore Digital Library
Author	Yongmei Dai Sumei Sun Zhongding Lei Yuan Li
Copyright Year	2004
Description	Author affiliation: Inst. for Infocomm Res., Singapore (Yongmei Dai; Sumei Sun; Zhongding Lei; Yuan Li)
Abstract	A list sphere decoder (LSD) based turbo receiver is introduced for groupwise space time trellis coded (GSTTC) systems. It can approach the single-user bound by iteratively exchanging soft information between the LSD and the soft-input soft-output (SISO) maximum a posteriori (MAP) space time trellis (STT) decoder. The LSD approximates the SISO maximum likelihood (ML) channel detector using only a subset of hypotheses, and thus greatly reduces the computational complexity. Simulation results show that good FER and BER performances as well as fast convergence can be achieved with a very small list for simple STT codes with a small number of states. For more powerful codes with more states, a large list is required. Compared with the linear minimum mean square error (LMMSE) turbo receiver, the proposed receiver is more flexible and converges faster. Its performance can always be improved by increasing the list size, but at the cost of increased complexity. For higher order modulation, the performance gain is larger.
Starting Page	804
Ending Page	808
File Size	384542
Page Count	5
File Format	PDF
ISBN	0780382552
ISSN	15502252
DOI	10.1109/VETECS.2004.1388940
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-05-17
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Iterative decoding Maximum likelihood decoding Maximum likelihood detection Detectors Computational complexity Computational modeling Bit error rate Convergence Mean square error methods Costs
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Electrical and Electronic Engineering Computer Science Applications

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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