NDLI: LO-FA-MO: Fault Detection and Systemic Awareness for the QUonG Computing System

Content Provider	IEEE Xplore Digital Library
Author	Ammendola, R. Biagioni, A. Frezza, O. Cicero, F.L. Lonardo, A. Paolucci, P.S. Rossetti, D. Simula, F. Tosoratto, L. Vicini, P.
Copyright Year	2014
Description	Author affiliation: Roma “Tor Vergata”, INFN, Rome, Italy (Ammendola, R.; Biagioni, A.; Frezza, O.; Cicero, F.L.; Lonardo, A.; Paolucci, P.S.; Rossetti, D.; Simula, F.; Tosoratto, L.; Vicini, P.)
Abstract	QUonG is a parallel computing platform developed at INFN and equipped with commodity multi-core CPUs coupled with last generation NVIDIA GPUs. Computing nodes communicate through a point-to-point, high performance, low latency 3D torus network implemented by the APEnet+ FPGA-based interconnect. Scaling of this cluster towards peta-and possibly exascale is a prominent investigation point and in this context fault tolerance issues are structural. Typical fault tolerance solutions for HPC systems (e.g. checkpoint/restart) need to be triggered to be applied in an automated and transparent way, or at least knowledge about occurring faults needs propagating in order to prompt a readjustment: an effective tool to detect faults and make the system aware of them is required. Thus, as a first step towards a fault tolerant QUonG we designed the Local Fault Monitor (LO\|FA\|MO), an HW/SW solution aimed at providing systemic fault awareness. LO\|FA\|MO allows the detection of node faults thanks to a mutual watchdog mechanism between the host and the APEnet+ NIC, moreover, diagnostic messages can be delivered to neighbour nodes through both the 3D network and a secondary connection for service communication. The double path ensures that no fault remains unknown at the global level, guaranteeing systemic fault awareness with no single point of failure. In this paper we describe our LO\|FA\|MO implementation, reporting preliminary measures that show scalability and its next to nil impact on system performance.
Starting Page	265
Ending Page	270
File Size	778793
Page Count	6
File Format	PDF
ISBN	9781479955848
ISSN	10609857
DOI	10.1109/SRDS.2014.33
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-10-06
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Registers Temperature measurement Three-dimensional displays Temperature sensors Peer-to-peer computing Monitoring networks Fault detection fault tolerant systems high performance computing
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computer Networks and Communications Software Hardware and Architecture

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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LO-FA-MO: Fault Detection and Systemic Awareness for the QUonG Computing System