NDLI: Porosity-Induced Electric Field Enhancement and Its Impact on Charge Transport in Porous Inter-Metal Dielectrics

Please wait, while we are loading the content...

2015 IEEE International Reliability Physics Symposium

2014 IEEE International Reliability Physics Symposium

2013 IEEE International Reliability Physics Symposium (IRPS)

2012 IEEE International Reliability Physics Symposium (IRPS)

2011 International Reliability Physics Symposium

2010 IEEE International Reliability Physics Symposium

2009 IEEE International Reliability Physics Symposium

2008 IEEE International Reliability Physics Symposium

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual

2006 IEEE International Reliability Physics Symposium Proceedings

2006 IEEE International Reliability Physics Symposium Proceedings 44th Annual

Conference committee

Table of contents

2007 International Reliability Physics Symposium

2007 IEEE International Reliability Physics Symposium; Call for Papers and Call for Posters

Jewel Recovery from Past IRPS Proceedings

Prediction of Logic Product Failure Due To Thin-Gate Oxide Breakdown

Recovery Effects in the Distributed Cycling of Flash Memories

Post-Breakdown Characteristics of Extrinsic Failure Modes for Ultra-Thin Gate Oxides

A Comprehensive Study of Low-k SiCOH TDDB Phenomena and Its Reliability Lifetime Model Development

Statistical and voltage scaling properties of post-breakdown for ultra-thin-oxide PFETs in inversion mode

Precise and Simple Methods for Detection of Initial Defects in 1.2 nm Gate Dielectrics Based on Nonlinear Conductions

A Comprehensive Study of FN Degradation for Driver MOSFETs in Nonvolatile Memory Circuit

Voltage Acceleration of TBD and Its Correlation to Post Breakdown Conductivity of N- and P-Channel MOSFETs

Explaining `Voltage-Driven' Breakdown Statistics by Accurately Modeling Leakage Current Increase in Thin SiON and SiO2/High-K Stacks

Effects of Dislocations and Stacking Faults on the Reliability of 4H-SiC PiN Diodes

GaN-ON-Si Failure Mechanisms and Reliability Improvements

Impact of A1N Interalayer on Reliability of AlGaN/GaN HEMTS

Via Processing Effects on Electromigration in 65 nm Technology

Identification and Analysis of Dominant Electromigration Failure Modes in Copper/Low-K Dual Damascene Interconnects

Minimum Void Size and 3-Parameter Lognormal Distribution for EM Failures in Cu Interconnects

Direct Measurement of Electromigration Induced Stress in Interconnect Structures

In-situ Formation of a Copper Silicide Cap For TDDB and Electromigration Improvement

Oxidation of the TA Diffusion Barrier and Its Effect on the Reliability of CU Interconnects

ESD MM Failures Resulting from Transient Reverse Currents

Experimental Evaluation and Device Simulation of Device Structure Influences on Latchup Immunity in High-Voltage 40-V CMOS Process

Investigation of External Latchup Robustness of Dual and Triple Well Designs in 65nm Bulk CMOS Technology

The Influence of a Novel Contacted Polysilicon-Filled Deep Trench (DT) Biased Structure and Its Voltage Bias State on CMOS Latchup

Optimization and Elimination of Parasitic Latchup in Advanced Smart Power Technologies

Study of Design Factors Affecting Turn-on Time of Silicon Controlled Rectifiers (SCRS) in 90 and 65nm Bulk CMOS Technologies

Detection of Electron Trap Generation due to Constant Voltage Stress on High-κ Gate Stacks

Large-Scale Time Characterization and Analysis of PBTI In HFO2/Metal Gate Stacks

Intrinsic Threshold Voltage Instability of the HFO2 NMOS Transistors

Determination of Time to Breakdown of 0.8-1.2 nm EOT HfSiON Gate Dielectrics with Poly-Si and Metal Gate Electrodes

Mechanism of Gradual Increase of Gate Current in High-K Gate Dielectrics and Its Application to Reliability Assessment

Impact of Crystalline Phase of Ni-Full-Silicide Gate Electrode on TDDB Reliability of HfSiON Gate Stacks

Decoupling of cold carrier effects in hot carrier reliability of HfO2 gated nMOSFETs

A Comparative Study on the Soft-Error Rate of Flip-Flops from 90-nm Production Libraries

Investigation of Thermal Neutron Induced Soft Error Rates in Commercial Srams with 0.35 μm to 90 nm Technologies

Radiation-Induced Soft Error Rates of Advanced CMOS Bulk Devices

Improving FPGA Design Robustness with Partial TMR

Gold-Aluminum Intermetallic Formation Kinetics

Geometry Effects on the Electromigration of Eutectic SN/PB Flip-Chip Solder Bumps

Kinetic Analysis of Current Enhanced Intermetallic Growth and Its Effect on Electromigration Reliability of Solder Joints

A PTH Reliability Model Considering Barrel Stress Distributions and Multiple PTHs in a PWB

X-Ray Inspection-Induced Latent Damage in DRAM

Sram Operational Voltage Shifts in the Presence of Gate Oxide Defects in 90 NM SOI

Impact of NBTI Induced Statistical Variation to SRAM Cell Stability

Oxide Breakdown After RF Stress: Experimental Analysis and Effects on Power Amplifier Operation

Lifetime Enhancement under High Frequency NBTI measured on Ring Oscillators

Field Degradation of Memory Components from Hot Carriers

Ambient Use-Condition Models for Reliability Assessment

Approach to Extrapolating Reliability of Circuits Operating in a Varying and Low Temperature Range

Flash Memory Field Failure Mechanisms

Impact of Nitrogen Incorporation in SiOx/HfSiO Gate Stacks on Negative Bias Temperature Instabilities

Impact of Nitrogen on PBTI Characteristics of HfSiON/TiN Gate Stacks

Substrate Current Independent Hot Carrier Degradation in NLDMOS Devices

Investigation of Hot Carrier Degradation Modes in LDMOS by using a Novel Three-Region Charge Pumping Technique

Hot Carrier Degradation in a Class of Radio Frequency n-Channel LDMOS Transistors

Analysis of the Back-Gate Effect on the On-State Breakdown Voltage of Smartpower SOI Devices

Snapback Breakdown Dynamics and ESD Susceptibility of LDMOS

Substrate Majority Carrier Induced NLDMOS Failure and Its Prevention in Advanced Smart Power Technologies

Advanced plasma and advanced gate dielectric - a charging damage prospective

On the Recovery of Simulated Plasma Process Induced Damage in High-κ Dielectrics

Ultra-thin Gate Dielectric Plasma Charging Damage in SOI Technology

Impact of Thin WSIX Insertion in Tungsten Polymetal Gate on Gate Oxide Reliability and Gate Contact Resistance

Oxide Thinning in Shallow Trench Isolation

A New Failure Mechanism of MLC NOR Flash Memory Caused by Aggravated Drain Disturb Due to Co-Salicidation Process

Impact of Metal Wet Etch on Device Characteristics and Reliability for Dual Metal Gate/High-k CMOS

Reliability Qualification of CoSi2 Electrical Fuse for 90Nm Technology

Reliability in MEMS Packaging

Reliability-Based MEMS System Modeling and Optimization

Reliability Issues in RF-MEMS Switches Submitted to Cycling and ESD Test

Stable and Reliable Q-Factor in Resonant MEMS with Getter Film

Electrical Breakdown Response for Multiple-Gap MEMS Structures

Reliability Prediction of Direct Tunneling RAM with SiON and HfSiON Tunnel Dielectrics Based on Transistor Leakage Current Measurements

Analysis of Thermal Variation of DRAM Retention Time

Resistance Drift of Aluminum Oxide Magnetic Tunnel Junction Devices

NBTI: An Atomic-Scale Defect Perspective

Analysis of NBTI Degradation- and Recovery-Behavior Based on Ultra Fast VT-Measurements

Investigation of Nitrogen-Originated NBTI Mechanism in SiON with High-Nitrogen Concentration

Effects of Hot Carrier Stress on Reliability of Strained-Si Mosfets

xAnalog Device and Circuit Performance Degradation Under Substrate Bias Enhanced Hot Carrier Stress

New Insights into Recovery Characteristics Post NBTI Stress

A Statistical Evaluation of the Field Acceleration Parameter Observed During Time Dependent Dielectric Breakdown Testing of Silica-Based Low-k Interconnect Dielectrics

A New TDDB Degradation Model Based on Cu Ion Drift in Cu Interconnect Dielectrics

Reliability Characterization of BEOL Vertical Natural Capacitor using Copper and Low-k SiCOH Dielectric for 65nm RF and Mixed-Signal Applications

Reliability Characterization of Different Pore Sealing Techniques on Porous Silk Dielectric Films

Dielectric Conduction Mechanisms of Advanced Interconnects: Evidence for Thermally- Induced 3D /2 D Transition

$BV_{CER}$ - Increased Operating Voltage for SiGe HBTs

Time-to-Fail Extraction Model for the "Mixed-Mode" Reliability of High-Performance SiGe Bipolar Transistors

Characterization of Charge Traps in Metal-Oxide-Nitride-Oxide-Semiconductor (MONOS) Structures for Embedded Flash Memories

Study of Charge Loss Mechanism of SONOS-Type Devices using Hot-Hole Erase and Methods to Improve the Charge Retention

Retention Reliability of FinFET SONOS Device

Temperature Monitor: A New Tool to Profile Charge Distribution in NROM Memory Devices

Realistic Projections of Product Fails from NBTI and TDDB

Modeling & Monitoring of Product DPPM with Multiple Fail Modes

Successful Development and Implementation of Statistical Outlier Techniques on 90nm and 65nm Process Driver Devices

Dopant Imaging and Profiling of Wide-Band-Gap Devices by Secondary Electron Potential Contrast

Switching Time Extraction of CMOS Gates using Time-Resolved Emission (TRE)

Dynamic Thermal Laser Stimulation Theory and Applications

A New Insight into the Breakdown Mechanism in Ultrathin Gate Oxides by Conductive Atomic Force Microscopy

Failure Defects Observed in Post-Breakdown High-κ/Metal Gate Stack Mosfet

Hot-Carrier Photoemission in Scaled CMOS Technologies: A Challenge for Emission Based Testing and Diagnostics

Time-Resolved and Stroboscopic EBIC Analyses on Dynamically Biased Active Devices

Oxide Particle Induced Leakage in Flash Memory Endurance Test

Understanding Mechanism of Film Attach Material Void Formation in Electronic Packages

Hirel Double Sided Package for Si/SiC Power Module

High Brightness Ingan Leds Degradation at High Injection Current Bias

Comprehensive Thickness-Dependent Power-Law of Breakdown in CMOS Gate Oxides

Effects of Nano-scale Schottky Barrier of Conductor-like Breakdown Path on Progressive Breakdown in MOSFET

New Extensive MVHR Breakdown Models

Breakdown Voltage Prediction of Ultra-Thin Gate Insulator in Electrostatic Discharge (ESD) Based on Anode Hole Injection Model

Accurate Characterization on Intrinsic Gate Oxide Reliability using Voltage Ramp Tests

Charge Pumping at Radio Frequencies: Methodology, Trap Response and Application

The Dynamic Current Distribution of a Multi-Fingered GGNMOS Under High Current Stress and HBMESD Events

The Impact of Inner Pickup on ESD Robustness of Multi-Finger NMOS in Nanoscale CMOS Technology

Dependence of Layout Parameters on CDE (Cable Discharge Event) Robustness of CMOS Devices in a 0.25-μm Salicided CMOS Process

SOI Poly-defined Diode for ESD Protection in High Speed I/Os

Self-Protecting Arrays for Open Drain Circuits

Infrared Ray Emission (IREM) Based Post-Silicon Power Debug Flows Developed for Chip Power Performance

Application of Electrical Diagnosis and C-AFM to Isolate on Board AC Scan Fail

45nm Node Categorized via Chain Resistance and Image by Optical Beam Induced Resistance Changes (OBIRCH) Method

Impact of untreated thicker CVD TiN film at a Via glue layer on Rc Performance in 0.15um CMOS Technology

Catastrophic Degradation of Organic Optical Thin Film Components

Surface Transportation of Chemical Species in Spray-Cleaning and Gate Oxide Integrity

Transient currents in HfO2 and their impact on circuit and memory applications

Fast Vth instability in HfO2 gate dielectric MOSFETs and Its impact on digital circuits

Gate Dielectric Integrity along the Road Map of CMOS Scaling including Multi-Gate Fet, TiN Metal Gate, and HfSiON High-k Gate Dielectric

Carrier Recombination in High-K Dielectrics and its Impact on Transient Charge Effects in High-k Devices

Improving carrier mobility and reliability characteristics of high-k NMOSFET by using stacked Y2O3/HfO2 gate dielectric

Realiability Characteristics of Metal/High-K Pmos with Top Interface Engineered Band Offset Dielectric (BOD)

Reliability of sub 30NM BT(Body-Tied)-FinFET with HFSION/Poly Silicon Gate Stack for symmetric Vth control

Generalized Models for Optimization of BTI in SiON and High-K Dielectrics

Effects of Al Doping on Electromigration Performance of Narrow Single Damascene Cu Interconnects

Determination of IRMS Rules for 65nm Node Design Foundations and Thermal Effect of Dummies

Effects of Width Scaling, Length Scaling, and Layout Variation on Electromigrationin in Dual Damascene Copper Interconnects

Study of Cu Migration-Induced Failure of Inter-Layer Dielectric

Analysis of Electromigration Voiding Phenomena in Cu Interconnects

Simulation of Electrical and Mechanical Properties of Air-Bridge Cu Interconnects

Porosity-Induced Electric Field Enhancement and Its Impact on Charge Transport in Porous Inter-Metal Dielectrics

Multimodal Analysis of Stress Induced Degradation of 90nm Node Interconnects

Improved Bipolar Electromigration Model

Size Effects and Temperature Dependence of Stress-Induced Voiding

Identification and Layout Modification of Copper/Low k Interconnect Dielectric Reliability Assessment by using RVDB Test

Identification of a Novel BTS and RVB Failure Mechanism in Copper/Ultra-Low k Integrations using a Stopless Trench Etch

Insight of stress effect on the ONO stack layer in a sONOS-type flash memory cell

Investigation of Charge Loss in Cycled NBit Cells via Field and Temperature Accelerations

Improvement of Data Retention Time Property by Reducing Vacancy-Type Defect in DRAM Cell Transistor

Reliability of MgO Tunneling Barrier for MRAM Device

Endurance and Retention Characteristics of SONOS EEPROMs Operated using BTBT Induced Hot Hole Erase

Temperature Dependence of Endurance Characteristics in NOR Flash Memory Cells

A New Phenomenon of Retention Time Evolution in Embedded DRAM Technology with High-K Dielectrics (Ta2O5) MIM Capacitor After HTOL Test

Circuit Performance Degradation of Sample-and-Hold Amplifier Due to Gate-Oxide Overstress in a 130-nm CMOS Process

Hot Carrier-Induced Degradation on High-K Trnasistors and Low Noise Amplifier

Enhanced GOI Degradation and Reliability Improvement of Nitrogen and Indium Co-Implant for Advanced Dual-Gate Oxide Application

Effect of Chemical Mechanical Polish Process on Low-Temperature Poly-Sige Thin-Film Transistors

Process Induced Instability and Reliability Issues in Low Temperature Poly-Si Thin Film Transistors

Anovel High Reliability ILD Stack

Study on the Retention Time of Body Tied FINFET DRAM with <100> Channel Directional Wafer

Investigation into the Dependency of Plasma Induced Damage on the Structural MOS Geometry with a Fast WLR Stress and Measurement Sequence

Elimination of Single Event Latchup in 90nm SRAM Technologies

Investigation of Hot carrier Degradation in Grooved Channel Structure nMOSFETs: Sphere shaped Recess Cell Array Transistor (SRCAT)

Dynamic Negative Bias Temperature Instability and Comprehensive Modeling in PMOS Body-Tied FinFETs

DC and AC NBTI Stresses in PMOSFETs with PE-SiN Capping

Degradation Mechanism in Low-Temperature P-Channel Polycrystalline Silicon TFTs Under Dynamic Stress

Interface-Trap Driven NBTI for Ultrathin (EOT~12Å) Plasma and Thermal Nitrided Oxynitrides

Physical Modeling of Negative Bias Temperature Instabilities for Predictive Extrapolation

Paradigm Shift for NBTI Characterization in Ultra-Scaled CMOS Technologies

Novel Model for HCI Degradation and Impact of Conventional and Non-Conventional Scaling

Phonon-Energy-Coupling Enhancement: Dramatic Improvement of the Reliability of Silicon MOS Transistors

A New NBTI Lifetime Model (Ig-model) and an Investigation on Oxide Thickness Effect on NBTI Degradation and Recovery

2006 IRPS Officers and Committees

Technical Program Committee

Best Paper Award

Outstanding Paper Award 2004 Paper Awards

2006 Irps Tutorial Program

2006 IEEE International Reliability Physics Symposium Proceedings

2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual.

2004 IEEE International Reliability Physics Symposium. Proceedings

2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual.

2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320)

2001 IEEE International Reliability Physics Symposium Proceedings. 39th Annual (Cat. No.00CH37167)

2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)

1999 IEEE International Reliability Physics Symposium Proceedings. 37th Annual (Cat. No.99CH36296)

1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173)

1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual

Proceedings of International Reliability Physics Symposium

Proceedings of 1995 IEEE International Reliability Physics Symposium

Proceedings of 1994 IEEE International Reliability Physics Symposium

31st Annual Proceedings Reliability Physics 1993

30th Annual Proceedings Reliability Physics 1992

29th Annual Proceedings Reliability Physics 1991

28th Annual Proceedings on Reliability Physics Symposium

27th Annual Proceedings., International Reliability Physics Symposium

26th Annual Proceedings Reliability Physics Symposium 1988

25th International Reliability Physics Symposium

24th International Reliability Physics Symposium

23rd International Reliability Physics Symposium

22nd International Reliability Physics Symposium

21st International Reliability Physics Symposium

20th International Reliability Physics Symposium

19th International Reliability Physics Symposium

18th International Reliability Physics Symposium

17th International Reliability Physics Symposium

16th International Reliability Physics Symposium

15th International Reliability Physics Symposium

14th International Reliability Physics Symposium

13th International Reliability Physics Symposium

12th International Reliability Physics Symposium

11th Reliability Physics Symposium

10th Reliability Physics Symposium

9th Reliability Physics Symposium

8th Reliability Physics Symposium

6th Annual Reliability Physics Symposium (IEEE)

Porosity-Induced Electric Field Enhancement and Its Impact on Charge Transport in Porous Inter-Metal Dielectrics

Content Provider	IEEE Xplore Digital Library
Author	Changsoo Hong Milor, L.
Copyright Year	2006
Description	Author affiliation: Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA (Changsoo Hong; Milor, L.)
Abstract	Free volumes or pores in porous ultra-low-k dielectrics enhance the local electric field in the neighborhood. In this paper, this enhanced local electric field is shown to facilitate the transport of charged species such as copper ions, electrons, or holes. This leads to the conclusion that porosity in dielectrics can degrade the insulating property and enhance the dielectric breakdown mechanism
Starting Page	679
Ending Page	680
File Size	240236
Page Count	2
File Format	PDF
ISBN	0780394984
DOI	10.1109/RELPHY.2006.251321
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-03-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Dielectric constant Dielectric films Dielectric breakdown Polarization Dielectric materials Anisotropic magnetoresistance Copper Charge carrier processes Dielectric devices Monte Carlo methods reliability porosity low-k dielectrics breakdown transport Monte Carlo
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in