NDLI: Fault tree analysis using stochastic logic: A reliable and high speed computing

Content Provider	IEEE Xplore Digital Library
Author	Aliee, H. Zarandi, H.R.
Copyright Year	2011
Description	Author affiliation: Department of Computer Engineering and Information, Technology, Amirkabir University of Technology, Hafez Ave., Tehran Iran (Aliee, H.; Zarandi, H.R.)
Abstract	Fault tree analysis is a widespread-use approach for analyzing reliability and safety in critical systems. In this paper, a new approach is introduced to analyze fault trees based on stochastic logic. Applying stochastic logic makes it possible to present floating point numbers as bit streams, in which the quantity of ‘1’ bits is proportional to the evaluated number. In addition, using stochastic logic-based circuits to analyze fault-trees makes the circuits reliable against possible fau lts in the computation circuitry. Moreover, stochastic logic-based fault-tree analysis is fast, since both static and dynamic fau lt tree gates can be easily mapped to their equivalents in stochastic logic, and then be implemented on hardware. The method is based on Monte Carlo algorithm, in which, the failure rates of basic components of a given system are computed at different time slots. At the next step, the whole system's failure rate could be calculated using the stochastic circuitry implemented on hardware. Repeating the experiments for several time slots, results in the reliability-time plot of the system. The experimental results show that this technique is fast and reliable, with negligible calculation error.
Starting Page	1
Ending Page	6
File Size	463843
Page Count	6
File Format	PDF
ISBN	9781424488575
ISSN	0149144X
e-ISBN	9781424488568
DOI	10.1109/RAMS.2011.5754466
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-01-24
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Fault trees Stochastic processes Reliability Monte Carlo methods Mathematical model Tunneling magnetoresistance Monte Carlo Simulation fault tree stochastic logic reliability
Content Type	Text
Resource Type	Article

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