NDLI: Simulation of real time scheduling at design levels

Content Provider	IEEE Xplore Digital Library
Author	Duenas, J.C. Leon, G.
Copyright Year	1995
Description	Author affiliation: Ciudad Univ., Madrid, Spain (Duenas, J.C.; Leon, G.)
Abstract	Real time systems (RTS) development adds-at least-two complexity factors to the traditional development tasks: time and resource constraints, and differences between development and final architecture. They make the development cycle longer. The paper presents one use of the well known formalism called High Level Time Petri nets (HLTPN) applied to the design of RTS in the form of subnets that can be easily attached to any functional specification given in Petri net terms, in order to include timing and resource allocation information early on in the development. Thus, creating a model of timing and resources available at the final architecture; it is feasible to validate them before generating the implementation code, and to obtain results about timing, scheduling and resource allocation at a previous stage in the development cycle. The results of the timing validation can be applied to the implementation code, or more cycle design/evaluations can be performed until a satisfactory alternative is found. The contribution of the paper can be included in the design level for RTS, although the solution is general enough to be applied to more specific fields, like embedded systems, hardware/software codesign, etc.
Starting Page	140
Ending Page	146
File Size	790134
Page Count	7
File Format	PDF
ISBN	0818671122
ISSN	10683070
DOI	10.1109/EMWRTS.1995.514304
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-06-14
Publisher Place	Denmark
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Timing Resource management Real time systems Time factors Petri nets Performance evaluation Embedded system Hardware Embedded software Software systems
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in