NDLI: Hardware in-the-loop simulation-a rapid prototyping approach for designing mechatronics systems

Content Provider	IEEE Xplore Digital Library
Author	Le, T. Renner, F.-M. Glesner, M.
Copyright Year	1997
Description	Author affiliation: Inst. of Microelectron. Syst., Darmstadt Univ. of Technol., Germany (Le, T.)
Abstract	Presents a rapid prototyping approach for the design and verification of mechatronics systems. We show the need for rapid prototyping the information processing part to perform hardware-in-the-loop simulation due to the limited modeling capability of mechanical processes. We propose the use of a graphical environment based on dataflow graphs to capture suitable algorithms. Through automatic extraction of C code targeting commercial digital signal processors and hardware-in-the-loop simulation, shorter turn-around cycles can be achieved. Furthermore, FPGA emulation or ASIC design can be started from the same dataflow graph which has already been validated, yielding improved confidence in and efficiency of the design flow. A real-world design example shows the feasibility of this approach for handling the complexity and heterogeneity of many algorithms found in mechatronics applications.
Starting Page	116
Ending Page	121
File Size	549101
Page Count	6
File Format	PDF
ISBN	0818680644
ISSN	10746005
DOI	10.1109/IWRSP.1997.618886
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-06-24
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Virtual prototyping Mechatronics Signal processing algorithms Prototypes Information processing Data mining Digital signal processors Field programmable gate arrays Emulation
Content Type	Text
Resource Type	Article
Subject	Computer Science

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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