NDLI: A compact 35-65 GHz up-conversion mixer with integrated broadband transformers in 0.18-/spl mu/m SiGe BiCMOS technology

Please wait, while we are loading the content...

2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

2014 IEEE Radio Frequency Integrated Circuits Symposium

2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

2012 IEEE Radio Frequency Integrated Circuits Symposium

2011 IEEE Radio Frequency Integrated Circuits Symposium

2010 IEEE Radio Frequency Integrated Circuits Symposium

2009 IEEE Radio Frequency Integrated Circuits Symposium

2008 IEEE Radio Frequency Integrated Circuits Symposium

2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium

IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006

Tri-mode integrated receiver for GPS, GSM 1800, and WCDMA

A low power low noise figure GPS/GALILEO front-end for handheld applications in a 0.35 /spl mu/m SiGe process

A WCDMA, GSM/GPRS/EDGE receiver front end without interstage SAW filter

A 1-to-4 channel receiver for WCDMA base-station applications

Evolution of a Software-Defined Radio Receiver's RF Front-End

Taming electrical solitons - a new direction in picosecond electronics

A 5 GHz above-IC FBAR low phase noise balanced oscillator

A 17 dBm 64 GHz voltage controlled oscillator with power amplifier in a 0.13 /spl mu/m SiGe BiCMOS technology

Differential VCO and passive frequency doubler in 0.18 /spl mu/m CMOS for 24 GHz applications

A 2.4-GHz sub-mW frequency source with current-reused frequency multiplier

A 1.2 V reactive-feedback 3.1-10.6 GHz ultrawideband low-noise amplifier in 0.13 /spl mu/m CMOS

A 1.8-3.1 dB noise figure (3-10 GHz) SiGe HBT LNA for UWB applications

A CMOS 3.1-10.6 GHz UWB LNA employing stagger-compensated series peaking

3/spl sim/11-GHz CMOS UWB LNA using dual feedback for broadband matching

A SiGe low-noise amplifier for 3.1-10.6 GHz ultra-wideband wireless receivers

DC/DC converter controlled power amplifier module for WCDMA applications

Coupling effects of dual SiGe power amplifiers for 802.11n MIMO applications

Integrated transformer baluns for RF low noise and power amplifiers

RF components with high reliability and low loss by partial trench isolation of SOI-CMOS technology

Silicon full integrated LNA, filter and antenna system beyond 40 GHz for MMW wireless communication links in advanced CMOS technologies

A fully-integrated dual-band MIMO transceiver IC

A low-power full-band 802.11abg CMOS transceiver with on-chip PA

An area-efficient 5-GHz multiple receiver RFIC for MIMO WLAN applications

A compact high rejection 2.4 GHz WLAN front-end module enables multi-radio co-existence up to 2.17 GHz

MBOA/WiMedia UWB transceiver design in 0.13/spl mu/m CMOS

VCO phase noise and sideband spurs due to substrate noise generated by on-chip digital circuits

AM-FM conversion by the active devices in MOS LC-VCOs and its effect on the optimal amplitude

Fully-integrated multi-standard VCOs with switched LC tank and power controlled by body voltage in 130nm CMOS/SOI

A 5GHz CMOS low phase noise transformer power combining VCO

A double-balanced injection-locked frequency divider for tunable dual-phase signal generation

31-34GHz low noise amplifier with on-chip microstrip lines and inter-stage matching in 90-nm baseline CMOS

60-GHz PA and LNA in 90-nm RF-CMOS

An 800-/spl mu/W 26-GHz CMOS tuned amplifier

A 27.7dBm OIP3 SiGe HBT cascode LNA using IM3 cancellation technique

A wideband noise-canceling CMOS LNA exploiting a transformer

A fully-integrated +23-dBm CMOS triple cascode linear power amplifier with inner-parallel power control scheme

A dynamic supply CMOS RF power amplifier for 2.4GHz and 5.2GHz frequency bands

Impedance optimization of linearizer to suppress intermodulation distortion in 2.45GHz SiGe WLAN power amplifier

Fully integrated Doherty power amplifiers for 5 GHz wireless-LANs

A 5.8GHz, 47% efficiency, linear outphase power amplifier with fully integrated power combiner

A single-chip 0.13 /spl mu/m CMOS UMTS W-CDMA multi-band transceiver

A low voltage (1.8V) operation triple band WCDMA transceiver IC

Fully integrated CMOS GPS receiver for system-on-chip solutions

High-performance crest factor reduction processor for W-CDMA and OFDM applications

GSM/GPRS single-chip in 130nm CMOS: challenges on RF for SoC integration

A low-power FSK modulator using fractional-N synthesizer for wireless sensor network application

Notice of Violation of IEEE Publication Principles A -85dBc reference spurs quadratude 1-2.5GHz dual-path sampled loop filter CMOS PLL with sub-1°rms phase noise

A low power bandpass /spl Sigma/ /spl Delta/ modulator injection locked synthesizer

A carrier frequency generator for multi-band UWB radios

A dual-band four-mode /spl Delta/-/spl Sigma/ frequency synthesizer

CMOS transceivers for the 60-GHz band

A highly linear SiGe double-balanced mixer for 77 GHz automotive radar applications

A 28 GHz sub-harmonic mixer using LO doubler in 0.18-/spl mu/m CMOS technology

A compact 35-65 GHz up-conversion mixer with integrated broadband transformers in 0.18-/spl mu/m SiGe BiCMOS technology

1 to 20 GHz CMOS distributed mixer using asymmetric coplanar strip transmission lines

An analytical approach to parameter extraction for on-chip spiral inductors with double-/spl pi/ equivalent circuit

High coupling transformer in CMOS technology

Characterization of Si-based monolithic transformers with patterned ground shield

Design of coplanar waveguide on-chip impedance-matching circuit for wireless receiver front-end

Novel 3 port characterisation and de-embedding for high performance on-silicon K/sub a/ band balun

A fully integrated 2.4-GHz CMOS RF transceiver for IEEE 802.15.4

Energy efficient OOK transceiver for wireless sensor networks

A 8.0-mW 1-Mbps ASK transmitter for wireless capsule endoscope applications

A 2.45-GHz RFID tag with on-chip antenna

Design of multistage rectifiers with low-cost impedance matching for passive RFID tags

A 0.18 /spl mu/m CMOS receiver for 3.1 to 10.6GHz MB-OFDM UWB communication systems

A fully integrated 3-band OFDM UWB transceiver in 0.25/spl mu/m SiGe BiCMOS

A novel low power UWB transmitter IC

A Schottky barrier diode ultra-wideband amplitude modulation (AM) detector in foundry CMOS technology

An analog correlator with dynamic bias control for pulse based UWB receiver in 0.18/spl mu/m CMOS technology

Fully integrated receiver front-ends for cell-phones in deep submicron CMOS

A low-noise 40-GS/s continuous-time bandpass /spl Delta//spl Sigma/ ADC centered at 2GHz

A novel IP2 calibration method for low-voltage downconversion mixers

A 2.4-GHz sub-mW CMOS current-reused receiver front-end for wireless sensor network

A transformer based 1.8-1.9GHz low-IF receiver for 1V in 0.13/spl mu/m CMOS

An analytical method to determine MOSFET's high frequency noise parameters from 50-/spl Omega/ noise figure measurements

Reverse noise measurement and use in device characterization

65-nm 160-GHz f/sub T/ RF n-MOSFET intrinsic noise extraction and modeling using lossy substrate de-embedding method

A 0.18 /spl mu/m dual-gate CMOS model for the design of 2.4 GHz low noise amplifier

Power supply rejection for common-source linear RF amplifiers: theory and measurements

A CMOS quadrature down-conversion mixer with analog I/Q correction obtaining 55 dB of image rejection for TV on mobile applications

Distributed amplifiers with non-uniform filtering structures

A fully integrated 24 GHz SiGe receiver chip in a low-cost QFN plastic package

A fully-integrated 0.13/spl mu/m CMOS low-IF DBS satellite tuner using a ring oscillator based frequency synthesizer

Millimeter-wave wireless personal area network systems

Notice of Violation of IEEE Publication Principles A 9.953-12.5GHz 0.13μm standard CMOS bondwire LC oscillator using a resistor-tuned varactor and a low-noise dual-regulator

10 GHz VCO for 0.13/spl mu/m CMOS Sonet CDR

A 40-Gb/s, digitally programmable peaking limiting amplifier with 20-dB differential gain in 90-nm CMOS

Transmitter and receiver circuits for serial data transmission over lossy copper channels for 10Gb/s in 0.13 /spl mu/m CMOS

An SOI CMOS, high gain and low noise transimpedance-limiting amplifier for 10Gb/s applications

Verification of RF SoCs: RF, analog, baseband and software

Next-generation silicon analysis tools for RF integrated-circuits

A unified modeling and design methodology for RFICs using parameterized sub-circuit cells

Layout optimization of RF CMOS in the 90nm generation by a physics-based model including the multi-finger wiring effect

Circuit model of a SiGe HBT flip-chip mounted onto a silicon carrier

Average current reduction in (W)CDMA power amplifiers

A 2.4-V low-reference-voltage operation, InGaP HBT-MMIC power amplifier module for CDMA applications

Large-signal characterization of an 870 MHz inverse class-F cross-coupled push-pull PA using active mixed-mode load-pull

A fully-integrated 900-MHz CMOS power amplifier for mobile RFID reader applications

A CMOS power amplifier for full-band UWB transmitters

A 2.4 GHz direct conversion transmitter for Wimax applications

A 2.4-GHz CMOS RF front-end for wireless sensor network applications

1-11 GHz ultra-wideband resistive ring mixer in 0.18-/spl mu/m CMOS technology

Receiver RF front-end with 5GHz-band LC voltage-controlled oscillator and subharmonically-locked ring oscillator for 17GHz wireless applications

A transformer-based receiver front-end for 5-GHz WLANs

A miniature 15-50-GHz medium power amplifier

Linear RF polar modulated SiGe Class E and F power amplifiers

High power LDMOS integrated Doherty amplifier for W-CDMA

SiGe integrated mm-wave push-push VCOs with reduced power consumption

A wide operation range CMOS frequency divider for 60GHz dual-conversion receiver

A 18-GHz silicon bipolar VCO with transformer-based resonator

A sub-mA FH frequency synthesizer technique

14-mW 5-GHz frequency synthesizer with CMOS logic divider and phase-switching dual-modulus prescaler

A 1 GHz /spl Sigma//spl Delta/ noise shaper for all digital PLLs with multiband UMTS modulation capability

Tailoring on-chip inductors for low-noise ultra-wide-band receiver applications

High performance NPN BJTs in standard CMOS process for GSM transceiver and DVB-H tuner

Why reciprocal procedure works?

Ultra-low power RFIC design using moderately inverted MOSFETs: an analytical/experimental study

High linearity performance of 0.13 /spl mu/m CMOS devices using field-plate technology

Wideband lumped element model for on-chip interconnects on lossy silicon substrate

Systematic design methodology for on-chip transformers with patterned ground shield

A broadband and scalable on-chip inductor model appropriate for operation modes of varying substrate resistivities

Minimization of via count in multiple-metal inductors performance characterization and physical modelling

A 3GHz subthreshold CMOS low noise amplifier

An X-band SiGe LNA with 1.36 dB mean noise figure for monolithic phased array transmit/receive radar modules

A +7.9dBm IIP3 LNA for CDMA2000 in a 90nm digital CMOS process

A 0.18/spl mu/m RF CMOS ultra wide band transmitter front end RFIC

Low-power full-band UWB active pulse shaping circuit using 0.18-/spl mu/m CMOS technology

Frequency characterization of a 2.4 GHz CMOS LNA by thermal measurements

Optimization of PGS pattern of transformers/inductors in standard RF BiCMOS technology for RFIC applications

2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium - Digest of Papers

2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers

IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003

2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)

2001 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium (IEEE Cat. No.01CH37173)

2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)

1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)

1998 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.98CH36182)

1997 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Technical Papers

A compact 35-65 GHz up-conversion mixer with integrated broadband transformers in 0.18-/spl mu/m SiGe BiCMOS technology

Content Provider	IEEE Xplore Digital Library
Author	Ping-Chen Huang Ren-Chieh Liu Jeng-Han Tsai Hong-Yeh Chang Huei Wang John Yeh Chwan-Ying Lee John Chern
Copyright Year	2006
Description	Author affiliation: Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei (Ping-Chen Huang; Ren-Chieh Liu; Jeng-Han Tsai; Hong-Yeh Chang; Huei Wang)
Abstract	This paper presents a compact 35-65 GHz Gilbert cell up-convert mixer implemented in TSMC 0.18-mum SiGe BiCMOS technology. Integrated broadband transformers and meandered thin-film microstrip lines were utilized to achieve a miniature chip area of 0.6 mm times 0.45 mm. The compact MMIC has a flat measured conversion loss of 7 plusmn 1.5 dB and LO suppression of more than 40 dB at the RF port from 35 to 65 GHz. The power consumption is 14 mW from a 4-V supply. This is a fully integrated millimeter-wave active mixer that has the smallest chip area ever reported, and also the highest operation frequency among up-conversion mixers using silicon-based technology
Sponsorship	THE IEEE MICROWAVE THEORY AND TECHNIQUES SOC. THE IEEE ELECTRON DEVICES SOC. THE IEEE SOLID STATE CIRCUITS SOC
File Size	196070
File Format	PDF
ISBN	0780395727
DOI	10.1109/RFIC.2006.1651129
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-06-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transformers Silicon germanium Germanium silicon alloys BiCMOS integrated circuits Transistors Microstrip MMICs Loss measurement Semiconductor device measurement Radio frequency
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in