NDLI: Multiuser chip timing recovery in asynchronous CDMA systems using a transpose domain filter

Content Provider	IEEE Xplore Digital Library
Author	Sud, S.
Copyright Year	2011
Description	Author affiliation: GCI, Inc., 14151 Newbrook Drive, Suite 300, Chantilly VA 20151, USA (Sud, S.)
Abstract	Asynchronous CDMA systems require that the base station synchronizes with each user's length N spreading code to despread and recover the modulated data. This problem is usually solved by a brute-force method of correlating the incoming signal with the spreading code. In this paper we present a method of obtaining chip-level synchronization for all K users of the system simultaneously. The approach derives from the transpose domain filter (TDF) method, which has been used to obtain bit timing of synchronous CDMA users. We propose a modified TDF to obtain chip timing for asynchronous users, whose solution is implemented efficiently using a parallel bank of multistage Wiener filters (MWFs) for all K users simultaneously. We demonstrate the effectiveness of the technique in giving near 100% success in timing estimation for heavily loaded systems when E ≥ 0 dB and enough bits, M, e.g. M ≥ 16N, is used to obtain the estimate.
Starting Page	186
Ending Page	189
File Size	160117
Page Count	4
File Format	PDF
ISBN	9781424476879
e-ISBN	9781424476862
DOI	10.1109/RWS.2011.5725413
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-01-16
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Synchronization Multiaccess communication Delay estimation Error correction codes Error correction Transpose domain filter CDMA
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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