NDLI: Total dose and single event effects testing of UTMC commercial RadHard/sup TM/ gate arrays

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Total dose and single event effects testing of UTMC commercial RadHard/sup TM/ gate arrays

Content Provider	IEEE Xplore Digital Library
Author	Kerwin, D.B. Benedetto, J.M.
Copyright Year	1998
Abstract	Results from total dose and single event effects testing of a UTMC Microelectronic Systems Commercial RadHard/sup TM/ gate array standard evaluation circuit (SEC) are reported. Total dose levels up to 300 krad(Si) and error rates of less than 1/spl times/10/sup -10/ errors/bit-day, with no single event latch-up (SEL), were demonstrated. Results from total dose testing of capacitor test structures from AMI's 0.6 /spl mu/m mixed signal process are also reported, indicating the possibility of greater than 200 krad(Si) total dose hardness for 0.6 /spl mu/m CMOS when processed with the UTMC Commercial RadHard/sup TM/ process module.
Starting Page	80
Ending Page	85
File Size	995810
Page Count	6
File Format	PDF
ISBN	0780351096
DOI	10.1109/REDW.1998.731481
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-07-24
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit testing Automatic testing Ambient intelligence Microelectronics Signal processing Foundries Radiation hardening CMOS process System testing Capacitors
Content Type	Text
Resource Type	Article

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