NDLI: Solid state switch application for the LHC extraction kicker pulse generator

Content Provider	IEEE Xplore Digital Library
Author	Carlier, E. Ducimetiere, L. Jansson, U. Schlaug, M. Schroder, G. Vossenberg, E.
Copyright Year	1996
Description	Author affiliation: CERN, Geneva, Switzerland (Carlier, E.)
Abstract	A semiconductor solid state switch has been constructed and tested in the prototype extraction kicker pulse generator of CERN's Large Hadron Collider (LHC). The switch is made of 10 modified 4.5 kV, 66 mm symmetric GTOs (also called FHCT-fast high current thyristor), connected in series. It holds off a DC voltage of 30 kV and conducts a 5 /spl mu/s half-sine wave current of 20 kA with an initial di/dt of 10 kA//spl mu/s. Major advantages of the switch are the extremely low self-firing hazard, no power consumption during the ready-to-go status, instantaneous availability, simple condition control, very low noise emission during soft turn-on switching and easy maintenance. However, the inherent soft, relatively slow turn-on time is a nonnegligible part of the required rise time and this involves adaptation of generator components. A dynamic current range of 16 is achieved with variations in rise time, which stay within acceptable limits. Important generator improvements have been made with the series diodes and freewheel diodes. A more efficient droop compensation circuit is being studied. It is directly connected in series with the freewheel diode stack and maintains an acceptable flattop variation of 5% of the magnet current during 90 /spl mu/s. This paper presents the complete generator, in particular the solid state switch, and discusses related electrical measurements.
Starting Page	67
Ending Page	70
File Size	490983
Page Count	4
File Format	PDF
ISBN	0780330765
DOI	10.1109/MODSYM.1996.564452
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-06-25
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Solid state circuits Large Hadron Collider Semiconductor diodes Semiconductor device testing Prototypes Pulse generation Thyristors Voltage Hazards
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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