NDLI: Parallel algorithms for k-tree recognition and its applications

Content Provider	IEEE Xplore Digital Library
Author	Adhar, G.S. Peng, S.
Copyright Year	1994
Description	Author affiliation: Dept. of Math. Sci., North Carolina Univ., Wilmington, NC, USA (Adhar, G.S.)
Abstract	The class of k-trees generalize the notion of trees, maximal outer-planar graphs, and caterpillars. We present new parallel algorithms to recognize k-trees and to find a collection of k vertex disjoint paths between a specified vertex pair (u,v), called a uv-cable, in a k-tree. A parallel algorithm to compute the k paths in a k-tree is also presented. The algorithms are based on parallel construction of a directed graph as a representation for R-trees, referred to as underlying trees in this paper. The model of parallel computation used is the CRCW PRAM (concurrent read, concurrent write, parallel RAM), where more than one processor can concurrently read from or write into the same memory location during the same memory cycle. Writing conflicts are resolved in a nondeterministic fashion. The recognition algorithm runs in O(log/sup 2/ n) time using O(m+n) processors. Constructing a spatial graph and the underlying tree representations of the k-tree for fixed k takes only O(log n) time using O(n) processors. The parallel algorithms for a uv-cable and k paths take O(log n) time using O(n) processors if the underlying tree structure of the k-tree is available.
Starting Page	194
Ending Page	201
File Size	503868
Page Count	8
File Format	PDF
ISBN	0818650907
DOI	10.1109/HICSS.1994.323265
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-01-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Parallel algorithms Trees, graphs Pattern recognition Computation time
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in