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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Quammen, D. DuBose, D.K. Tabak, D. |
| Copyright Year | 1988 |
| Description | Author affiliation: George Mason Univ., Fairfax, VA, USA (Quammen, D.; DuBose, D.K.; Tabak, D.) |
| Abstract | One characteristic of RISC architectures is the availability of a large register bank, usually used as a LIFO stack to house the activation records of procedures. In a multitasking situation, RISC designers have suggested that this stack be copied at every task-context switch. The overhead of this copying is high, and it is frequently cited as the reason for which stack-based architectures should not be used in a multitasking situation. The architecture presented facilitates multitasking by allowing multiple register stacks, created dynamically, to be supported with the same overhead as sequential procedure calls. In addition, it allows registers to be used for other non-LIFO structures, such as object or class instantiations. These register-housed data structures can be accessed by any task or procedure unit. |
| Starting Page | 230 |
| Ending Page | 237 |
| File Size | 521987 |
| Page Count | 8 |
| File Format | |
| ISBN | 0818608412 |
| DOI | 10.1109/HICSS.1988.11770 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1988-01-01 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Reduced instruction set computing Multitasking Registers Architecture Switches Data structures Statistics Computer aided instruction Computer languages Handicapped aids |
| Content Type | Text |
| Resource Type | Article |
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