NDLI: FFTs in external or hierarchical memory

Content Provider	IEEE Xplore Digital Library
Author	Bailey, D. H.
Copyright Year	1989
Description	Author affiliation: NASA Ames Research Center, Moffett Field, CA (Bailey, D. H.)
Abstract	Conventional algorithms for computing large one-dimensional fast Fourier transforms (FFTs), even those algorithms recently developed for vector and parallel computers, are largely unsuitable for systems with external or hierarchical memory. The principal reason for this is the fact that most FFT algorithms require at least m complete passes through the data set to compute a 2m-point FFT. This paper describes some advanced techniques for computing an ordered FFT on a computer with external or hierarchical memory. These algorithms (1) require as few as two passes through the external data set, (2) employ strictly unit stride, long vector transfers between main memory and external storage, (3) require only a modest amount of scratch space in main memory, and (4) are well suited for vector and parallel computation. Performance figures are included for implementations of some of these algorithms on Cray supercomputers. Of interest is the fact that a main memory version outperforms the current Cray library FFT routines on the Cray-2, the Cray X-MP, and the Cray Y-MP systems. Using all eight processors on the Cray Y-MP, this main memory routine runs at nearly two gigaflops.
Starting Page	234
Ending Page	242
File Size	664475
Page Count	9
File Format	PDF
ISBN	0897913418
DOI	10.1145/76263.76288
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-11-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	ACM Press
Subject Keyword	Flexible printed circuits Concurrent computing Permission Fast Fourier transforms NASA Frequency Libraries Algorithm design and analysis Distributed computing Machinery
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Analysis of complex LNS FFTs

Fast n-D Fourier-Heisenberg-Weyl transforms

Low-complexity reconfigurable complex constant multiplication for FFTs

Compute intensity and the FFT

High-performance parallel FFT algorithms for the HITACHI SR8000

Computing the pipelined phase-rotation FFT

Interpolational fast fourier transform

SIMD Vectorization of Non-Two-Power Sized FFTs

A Distributed Logarithmic FFT Processor

FFTs in external or hierarchical memory

Similar Documents

Analysis of complex LNS FFTs

Fast n-D Fourier-Heisenberg-Weyl transforms

Low-complexity reconfigurable complex constant multiplication for FFTs

Compute intensity and the FFT

High-performance parallel FFT algorithms for the HITACHI SR8000

Computing the pipelined phase-rotation FFT

Interpolational fast fourier transform

SIMD Vectorization of Non-Two-Power Sized FFTs

A Distributed Logarithmic FFT Processor

FFTs in external or hierarchical memory