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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Husbands, Parry Yelick, Katherine |
| Copyright Year | 2007 |
| Description | Author affiliation: Lawrence Berkeley National Laboratory, Berkeley, CA (Husbands, Parry) || University of California at Berkeley, Berkeley, CA (Yelick, Katherine) |
| Abstract | Dense LU factorization has a high ratio of computation to communication and, as evidenced by the High Performance Linpack (HPL) benchmark, this property makes it scale well on most parallel machines. Nevertheless, the standard algorithm for this problem has non-trivial dependence patterns which limit parallelism, and local computations require large matrices in order to achieve good single processor performance. We present an alternative programming model for this type of problem, which combines UPC's global address space with lightweight multithreading. We introduce the concept of memory-constrained lookahead where the amount of concurrency managed by each processor is controlled by the amount of memory available. We implement novel techniques for steering the computation to optimize for high performance and demonstrate the scalability and portability of UPC with Teraflop level performance on some machines, comparing favourably to other state-of-the-art MPI codes. |
| Starting Page | 1 |
| Ending Page | 10 |
| File Size | 368977 |
| Page Count | 10 |
| File Format | |
| ISBN | 9781595937643 |
| DOI | 10.1145/1362622.1362664 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-11-10 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Parallel processing Delay Sparse matrices High performance computing Concurrent computing Multithreading Communication system control Costs Government Yarn multithreading dense linear algebra latency tolerance |
| Content Type | Text |
| Resource Type | Article |
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