NDLI: Designing interconnection networks for multi-level packaging

Content Provider	IEEE Xplore Digital Library
Author	Raghunath, M.T. Ranade, A.
Copyright Year	1993
Description	Author affiliation: Comput. Sci. Div., California Univ., Berkeley, CA, USA (Raghunath, M.T.; Ranade, A.)
Abstract	A central problem in building large scale parallel machines is the design of the interconnection network. Interconnection network design is largely constrained by packaging technology. The authors start with a generic set of packaging restrictions and evaluate different network organizations under a random traffic model. They identify families of networks (product of complete graphs, high degree deBruijn graphs) that they believe will be useful for multilevel packaging. The results indicate that customizing the network topology to the packaging constraints is useful. Some of the general principles that arise out of this study are: (1) making the networks denser at the lower levels of the packaging hierarchy has a significant positive impact on global communication performance, (2) it is better to organize a fixed amount of communication bandwidth as a smaller number of high bandwidth channels, and (3) providing the processors with the ability to tolerate latencies (by using multithreading) is very useful in improving performance.
Starting Page	772
Ending Page	781
File Size	747336
Page Count	10
File Format	PDF
ISBN	0818643404
ISSN	10639535
DOI	10.1109/SUPERC.1993.1263535
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-11-19
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Multiprocessor interconnection networks Packaging machines Bandwidth Buildings Large-scale systems Parallel machines Telecommunication traffic Traffic control Network topology Global communication
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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