NDLI: A combined coherent carrier recovery and decision-directed delay-lock-loop scheme for DS/SSMA communication systems employing complex spreading sequences

Content Provider	IEEE Xplore Digital Library
Author	Marx, F.E. Linde, L.P.
Copyright Year	1998
Description	Author affiliation: Dept. of Electr. & Electron. Eng., Pretoria Univ., South Africa (Marx, F.E.)
Abstract	The majority of papers on code synchronization loop design for DSSS communication systems concentrate on noncoherent schemes employing binary spreading sequences with loop structures comprising early and late arm structures with squaring devices which are very prone to arm imbalance effects. In this paper a novel decision-directed code-lock-loop (DD-CLL) synchronization scheme is proposed for DS/SSMA communication systems employing either binary or complex spreading sequences. The novelty of the proposed CLL structure lies in the use of difference signals in both the spreading, demodulation/despreading and CLL processes, which results in the elimination of unwanted cross product interference terms when employing complex spreading sequences. Additional advantages of the new structure include features such as less sensitivity to arm imbalance problems due to the elimination of squaring devices, improved tracking capability and simplified hardware by requiring only two correlators in stead of four in the CLL structure. The loop response is analysed and its performance verified through computer simulation in the presence of AWGN and typical non-stationary channel effects, employing both binary as well as a relatively new family of complex linearly and non-linearly root-of-unity (Land NL-RU) filtered spreading sequences, including a novel class of previously introduced analytical bandlimited complex (ABC) sequences.
Starting Page	837
Ending Page	842
File Size	671676
Page Count	6
File Format	PDF
ISBN	078034281X
DOI	10.1109/ISSSTA.1998.722496
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-09-04
Publisher Place	South Africa
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Spread spectrum communication Transmitters Signal processing Performance analysis Hardware Correlators AWGN Multiaccess communication Personal communication networks
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Analogue CMOS DSSS CDLL synchronisation scheme employing complex spreading sequences

Decision-directed coherent delay-lock tracking loop for DS-spread-spectrum signals

Error probabilities for DS/SSMA communications using random sequences

Sequence acquisition techniques for CDMA systems employing Kasami sequences

Performance of TCM DS/SSMA in urban multipath fading channel

Optimum chip waveforms for DS/SSMA communications with random spreading sequences and a matched filter receiver

RA/T spreading code scheme for centralized DS/SSMA packet radio networks

Performance Of An Asynchronous DS/SSMA (DS/CDMA) System With Kronecker Sequences

Performance evaluation of a joint source/channel coding scheme for DS/SSMA systems utilizing complex spreading sequences in multipath fading channel conditions

A combined coherent carrier recovery and decision-directed delay-lock-loop scheme for DS/SSMA communication systems employing complex spreading sequences

Similar Documents

Analogue CMOS DSSS CDLL synchronisation scheme employing complex spreading sequences

Decision-directed coherent delay-lock tracking loop for DS-spread-spectrum signals

Error probabilities for DS/SSMA communications using random sequences

Sequence acquisition techniques for CDMA systems employing Kasami sequences

Performance of TCM DS/SSMA in urban multipath fading channel

Optimum chip waveforms for DS/SSMA communications with random spreading sequences and a matched filter receiver

RA/T spreading code scheme for centralized DS/SSMA packet radio networks

Performance Of An Asynchronous DS/SSMA (DS/CDMA) System With Kronecker Sequences

Performance evaluation of a joint source/channel coding scheme for DS/SSMA systems utilizing complex spreading sequences in multipath fading channel conditions

A combined coherent carrier recovery and decision-directed delay-lock-loop scheme for DS/SSMA communication systems employing complex spreading sequences