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2015 45th European Solid State Device Research Conference (ESSDERC)

2014 44th European Solid State Device Research Conference (ESSDERC)

2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

2010 Proceedings of the European Solid State Device Research Conference

2009 Proceedings of the European Solid State Device Research Conference

ESSDERC 2008 - 38th European Solid-State Device Research Conference

ESSDERC 2007 - 37th European Solid State Device Research Conference

2006 European Solid-State Device Research Conference

Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005.

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)

ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003.

32nd European Solid-State Device Research Conference

31st European Solid-State Device Research Conference

30th European Solid-State Device Research Conference

ESSDERC 2000 Title Page

Conference Organization

ESSDERC 2000 Table of Contents

Micromechanical Circuits for Wireless Communications

Embedded DRAM Technologies

Heading for decananometer CMOS - Is navigation among icebergs still a viable strategy?

The Impact of SiGe BiCMOS Technology on Microwave Circuits and Systems

Challenges and Recent Developments in Device Isolation Technology

Present Understanding of Gate Oxide Wearout

Atomistic Insights into Ultra-Shallow Junction Formation

FeRAM Technology

Recent Progress on Advanced Interconnects

Technology Requirements for Next Decade Flash Memories

Red Vertical Cavity Surface Emitting Laser Technology

The Proliferation of Silicon Germanium

Technology and System Integration of CMOS Image Sensors

Deactivation Phenomenon for 0.18um Technology Indium Channel NMOS Devices

Subthreshold hump mechanisms for both surface and buried channel MOSFET using STI technology

Narrow Device Issues in Deep-Submicron Technologies-the Influence of Stress, TED and Segregation on Device Performance

Breakdown and Recovery of Thin Gate Oxides

Abnormal Gate Oxide Failure due to Stress enhanced Polycrystalline Silicon Diffusion

Drain Bias Dependence of Gate Oxide Reliability in Conventional and Asymmetrical Channel MOSFETs in the Low Voltage Regime

Degradation of Si MOSFET Gate Oxides by Ion Implantation

Impact of Gate Oxide Thickness Scaling on Hot-Carrier Degradation in Deep-sub-micron nMOSFETs

Observation of a New Hole Gate Current Component in p(+)-poly Gate p-channel MOSFET's

Comparison of Second Impact Ionization Phenomena Between 0.18um N- and P-channel MOSFET's

Study of Secondary Electron Injection Phenomena in Deep Sub-micron MOSFETs and Flash Cells

Physically Based Comparison of Current Noise Analysis of Si BJT's and SiGe HBT's

1/f Noise Modeling in a-Si TFTs by BSIM Software

RF analysis of aggressively scaled pHEMTs

Scalable Inductor Model on Lossy Substrates with Accurate Eddy Current Simulation

A New Physical Model for the Relaxation in Ferroelectrics

Simple Formulae for the Effective Plus-Factor for Transient Enhanced Diffusion

The influence of silicon interstitial clusters on the Reverse Short Channel Effect

Modelling of Intrinsic Aluminum Diffusion for Future Power Devices

Incorporation of Equipment Simulation into Integrated Feature Scale Profile Evolution

High Frequency performance 0.1um gate-length Ge/Si

High hole mobilities in fullly-strained Si/Si(1-x)Ge(x) (0.3 < x < 0.4) layers and their significance for SiGe pMOSFET performance

Extending KrF Lithography to 0.13 um sub-8F2 DRAM Technology: The Importance of Lithography-Centric Design

DRAM Cell with High Signal Charge and Small Storage Capacitance Using the Gain Concept

Capacitance Enhancement by Mesopore Formation for sub 100nm Deep Trench DRAM Technology

IC-Compatible Two-level Bulk Micromachining for RF Silicon Technology

Copper Drifts in Porous Methylsilsesquiazane Low-k Dielectric Films

Shallow and Deep Trench Isolation for use in RF-Bipolar IC:s

Performance Characterization of Advanced Interconnects on High Speed VLSI Circuits

Quantum Effects in SOI Single-Hole Transistors

Indication of Non-equilibrium Transport in SiGe p-MOSFETs

Using the Self Aligned Field Implant to Design High Voltage Devices in Sub-µm CMOS Technologies

High Voltage MOS Transistor with a Folded n- Region for Flash Technology

Analysis on the Avalanche Ruggedness of Finger Type and Stripe Type LDMOS Transistor

Temperature-Dependent Character istics of a Novel InP/InGaAlAs Heterojunction Bipolar Transistor

A Novel Functional Negative-Differential-Resistance Heterojunction Bipolar Transistor (NDR-HBT)

A Comparison of PNP and NPN SiGe Heterojunction Bipolar Transistors Fabricated by Ge(+)-implantation

Integrated Photodiodes for DVD and CD-ROM Applications

Optimisation of a TiSi2 SALICIDE Process in a 0.18 um CMOS Technology with Dual Selective Etch Process TISE2

Optimisation of a Pre-Metal-Dielectric with a contact etch stop layer for 0.18um and 0.13um technologies

NO post annealed oxide versus re-oxidised NO oxide

Water-Assisted Positive Ion Contamination Resulting in Charge Loss in Nonvolatile Memories

Dose Loss and Defect Mechanisms in Antimony Buried Layers for a 0.35um BiCMOS Process

Plasma Damage Impact in 0.25 um Dual-Gate Technology

Investigation of Dynamic Memory Effects in Si-dot Devices

Novel DRAM Cell Transistor using Self Aligned Local Field Implantation (SALFI) for Enhanced Data Retention Time

Dynamics of Fast-Erasing Bits in Flash Memories

Contribution of interface traps to valence band electron tunneling in PMOS devices

Cathode Hot Electrons and Anode Hot Holes in Tunneling MOS Capacitors

Oxide Thickness Scaling Limit for Optimum CMOS Logic Circuit Performance

Complete re-estimation of the gate leakage current limit for sub-0.12um technologies (EOT= 1.8-2.8nm)

Capacitor Test Structures for C-V Measurements on CMOS Devices with Sub-20 Å Oxides

Role of interface and bulk defect-states in the low-voltage leakage conduction of ultrathin oxides

Adaptation of "Drain Current Charge Pumping Technique" for Interface Trap Characterization in Short Channel MOS Transistors

Single Trap Profiling by Charge Pumping

A Global Self-Heating Model for Device Simulation

Device simulation of all-polymer thin-film transistors

A CPU Efficient Electron Mobility Model for MOSFET Simulation with Quantum Corrected Charge Densities

Self-consistent Optimization and Performance Analysis of Double-Gate MOS Transistors

A comparison between semi-classical and quantum-mechanical escape-times for gate current calculations

Large signal compact modeling of the dependence of Early voltage with driving mode in Si/Si(1-x)Ge(x) bipolar transistors

New Shift-&-Ratio Leff extraction algorithm for Fully-Depleted SOI CMOS transistors

Macro Model for Flash EEPROM Cells

A Simple and Accurate Deep Submicron Mismatch Model

2D dopant profiling of advanced CMOS technologies by preferential etching, comparison with 2D process simulations

Accurate Doping Profile Extraction Near the Si/SiO2 Interface with a Novel Low Temperature C-V Technique

Inverse Modelling of Trapped Charge in Hot-Carrier Stressed nMOSFET

Comparison of two High-Frequency Noise Characterization Methods for SiGe HBTs

High-Voltage Drain Extended MOS Transistors for 0.18 um Logic CMOS Process

Scalable High Voltage Trenchgate Transistor for Flash

Exploring Various MOS-Thyristor Associations for a New Power Integrated Function: the IGTH

Optimisation of N-Channel Trench MOS for Power Applications

Investigation of the suitability of spike anneal for advanced CMOS technology

Using Ge pre-amorphisation and spike annealing for optimizing shallow junctions in deep-submicron CMOS

Optimization of extension doping technology for roll-off suppression of industrial 0.1-um pMOSFETs

Ultra-Thin High Quality Oxynitride Formed by NH3 Nitridation and High Pressure O2 Re-oxidation

Full CMP Integration of TiN Damascene Metal Gate Devices

3D self-assembling and actuation of electrostatic micro-mirrors

The Orientation Dependence of the Piezojunction Effect in Bipolar Transistors

On a Novel Technique for the Electrical Characterization of Polycrystalline Silicon

Electrical Characterisation of Gate Dielectrics Deposited with Multipolar Electron Cyclotron Resonance Plasma Source

On the InGaP/In(x)Ga(1-x)As Pseudomorphic High Electron-Mobility Transistor s with High-Temperature Reliabilities

A GaAs Device Isolation Technique by Liquid Phase Chemical-Enhanced Oxidation

Evaluation of Germanium JFET for low temperature operation

Electrical characterisation of n and p-channel SiGe MOSFETs with gate oxides formed by plasma oxidation

Transient I-V-Characteristics of OLEDs with Deep Traps

Fabrication of GaN LEDs for Optical Communications

Controlling the TCR of thin film resistors

Analysis of RF Monolithic Transformers

Integrated Transmission Lines on High-Resistivity Silicon: Coplanar Waveguides or Microstrips?

RF Distortion Characterisation of Sub-Micron CMOS

Improved Output Conductance for Low-Voltage Microwave LDMOS Transistors

Fluctuation Limits on Scaling of CMOS SRAMs

MOS Memory Using Silicon Nanocrystals Formed by Very-Low Energy Ion Implantation

Testing CMOS circuits at 50ps resolution with single-photon avalanche detectors

Determination of the Recombination Lifetime in the Space Charge Region of MOS Field-Induced PN Junctions

On the Characterisation of ALCVD ZrO2; Electrical and Structural Properties

A Novel Test Structure for Sub-micron CMOS Leakage Characterisation and Modelling

Improvement of Flicker Noise in Lateral Asymmetric Channel N-MOSFETs for Sub-micron Analog Applications

Switching Behaviour and Noise of Soft Breakdown Current in Ultra-Thin Gate Oxides

On the Noise in Dynamic Threshold (DT) MOS/SOI Transistors

Channel Noise Current in Deep Sub-Micron MOSFETs

Impact of nitridation of SiO2 gate oxide on 1/f noise in 0.18um CMOS

Area-Efficient ESD Protection Design without Additional Process Cost in 0.18 um Salicided CMOS Technology

Investigation of 3D Phenomena in the Triggering of gg-nMOS Electrostatic Discharge Protection Devices

ESD protection in deep submicron CMOS technology -- Does the transient matter?

Analysing Antenna Ratio Dependence of Plasma Charging Damage with Weibull Breakdown Statistics

Ultra-Thin Gate Oxide (1.6 nm): New Mechanisms of Plasma Induced Damage and Oxidation Process Optimisation

Dielectric pockets a new concept of the junctions for deca-nanometric CMOS devices

Investigation of single and double gate SOI MOSFETs in Accumulation Mode for enhanced performances and reduced technological drawbacks

A Comparative Study of Surface and Buried P-Channel 0.10um MOSFETs

High performance 0.1 um pMOSFETs with optimized poly-Si and poly-SiGe gates

Short Channel Vertical Sidewall Transistors

Investigation of the Effectiveness of a Buried Carbon Layer to Suppress Transient Diffusion Effects in SiGe HBTs

Emitter Scaling of Single-Polysilicon SiGe:C HBTs with Highly Doped Base Layers

Impact on Low-Frequency Noise Properties from Lateral Design of Differentially Grown SiGe HBTs

Analysis of the Emitter Charge Storage in SiGe Heterojunction Bipolar Transistors with a Lightly Doped Emitter

200GHz SiGe Hetero Bipolar Transistor Design

RF-CMOS Performance Trends

EP120: A 0.35um, 3V/5V, Mixed-Signal/RF BiCMOS Technology

Dependence of Channel Width and Length on MOSFET Matching for 0.18 um CMOS Technology

Microdisplay Packaging Challenge

Low Frequency Noise in CdSe Thin-Film Transistors

PLEDs for Integration with MOS Circuits

Measurements and 3D Simulations of Full-Chip Potential Distribution at Parasitic Substrate Current Injection

Electron injection in MOSFETs with a self-consistent Si and SiO2 BTE solution based on spherical-harmonics expansion

Simulation of Polysilicon Emitter Bipolar Transistors

Transport mechanisms of a polysilicon emitter bipolar transistor with 8 nm gate oxide between emitter and base

Statistical Hot-Carrier Reliability Simulation using a Novel SPICE Parameter Evolution Model

Numerical Simulation and Comparison of Vertical and Lateral SiGe HBT's for RF/Microwave Applications

Capacitance Modelling of LDMOS Transistors

29th European Solid-State Device Research Conference

28th European Solid-State Device Research Conference

27th European Solid-State Device Research Conference

ESSDERC '96: Proceedings of the 26th European Solid State Device Research Conference

ESSDERC '95: Proceedings of the 25th European Solid State Device Research Conference

ESSDERC '94: 24th European Solid State Device Research Conference

ESSDERC '93: 23rd European solid State Device Research Conference

ESSDERC '92: 22nd European Solid State Device Research conference

ESSDERC '91: 21st European Solid State Device Research Conference

ESSDERC '90: 20th European Solid State Device Research Conference

ESSDERC '89: 19th European Solid State Device Research Conference

ESSDERC '88: 18th European Solid State Device Research Conference

ESSDERC '87: 17th European Solid State Device Research Conference

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