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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Blume, H. Feldkamper, H.T. Hubert, H. Noll, T.G. |
| Copyright Year | 2001 |
| Description | Author affiliation: Institute of Technology, RWTH Aachen, Aachen, Germany (Blume, H.) |
| Abstract | Optimum partitioning plays a crucial role in the implementation of systems on heterogeneous target architectures. Typical target architectures for such systems include FPGAs, semi-custom or physically optimized ASICs as well as programmable digital signal or general purpose processors. The goal was to provide an estimation for implementation specific parameters like throughput rate, power dissipation and required silicon area by means of cost functions. Considering normalization we provide implementation parameters of selected basic operations like linear and nonlinear filtering, exemplary arithmetic operation and simple matching operations which all are required in the digital video processing domain. These operations were optimized for each architecture block. We show quantitatively that the cost ratio between different architecture blocks highly depends on the operation to be performed. This information is essential in order to find the optimum partitioning for implementing a system. |
| Starting Page | 409 |
| Ending Page | 412 |
| File Size | 182362 |
| Page Count | 4 |
| File Format | |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-09-18 |
| Publisher Place | Austria |
| Access Restriction | Subscribed |
| Rights Holder | Non IEEE |
| Subject Keyword | Cost function Field programmable gate arrays Signal processing Throughput Power dissipation Silicon Digital filters Nonlinear filters Matched filters Filtering |
| Content Type | Text |
| Resource Type | Article |
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