NDLI: A 650GHz SiGe receiver front-end for terahertz imaging arrays

Content Provider	IEEE Xplore Digital Library
Author	Ojefors, E. Pfeiffer, U.R.
Copyright Year	2010
Description	Author affiliation: University of Wuppertal, Germany (Ojefors, E.; Pfeiffer, U.R.)
Abstract	Terahertz (300GHz-to-3THz) imaging systems and radars are capable of providing high resolution images while still penetrating many materials [1]. Imaging receivers based on III–V Schottky diodes and waveguide technology provide noise figures of less than 11dB at 590GHz [2] but cannot be easily integrated into low-cost large-scale imaging arrays. Silicon technologies, such as CMOS and SiGe BiCMOS, excel at large-scale integration and have recently shown capability of terahertz frequency generation [3], as well as low-noise mm-Wave detection [4]. However, due to the low power levels achievable on-chip, present silicon implementations of terahertz heterodyne receivers still require an externally generated local oscillator (LO) while suffering from noise figures (NF) in excess of 68dB due to insufficient pumping [5]. This paper presents an antenna-integrated, subharmonically pumped 650GHz receiver in silicon technology with the capability of on-chip LO amplification and distribution.
Starting Page	430
Ending Page	431
File Size	2100489
Page Count	2
File Format	PDF
ISBN	9781424460335
ISSN	01936530
e-ISBN	9781424460366
DOI	10.1109/ISSCC.2010.5433886
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-02-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon germanium Germanium silicon alloys Optical imaging Noise figure Noise measurement Impedance matching Frequency conversion Submillimeter wave technology Antenna measurements Power amplifiers
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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