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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xiaohui Tang Baie, X. Bayot, V. Van de Wiele, F. Colinge, J.P. |
| Copyright Year | 1999 |
| Description | Author affiliation: Lab. for Microelectron., Katholieke Univ., Leuven, Belgium (Xiaohui Tang) |
| Abstract | Several nano flash memory devices have been reported in the literature (Nakajima et al. 1996; Guo et al. 1996; Welser et al. 1997). These devices are basically miniature EEPROM cells in which electrons are injected in a floating storage node by tunnel effect through an oxide layer. The variation of the potential of the floating node due to electron injection modifies the threshold voltage of a thin and narrow SOI MOSFET, which makes it possible to store information in the device. This paper describes the fabrication of an SOI nano flash memory device using Unibond/sup (R)/ wafers and e-beam lithography. The device can be programmed and erased using 5 V gate voltage pulses. The area of the active storage region is 150 nm/spl times/150 nm. |
| Sponsorship | IEEE Electron Devices Soc |
| Starting Page | 100 |
| Ending Page | 101 |
| File Size | 124732 |
| Page Count | 2 |
| File Format | |
| ISBN | 0780354567 |
| ISSN | 1078621X |
| DOI | 10.1109/SOI.1999.819872 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1999-10-04 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Flash memory Silicon Electrons Oxidation Threshold voltage MOSFET circuits Fabrication Temperature measurement Microelectronics EPROM |
| Content Type | Text |
| Resource Type | Article |
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