NDLI: Implementation parallelized queueing network simulations using FORTRAN and data abstraction

Content Provider	IEEE Xplore Digital Library
Author	Miller, K.W. Nicol, D.M.
Copyright Year	1988
Description	Author affiliation: The College of William and Mary (Miller, K.W.)
Abstract	Researchers experimenting with simulation on novel computers with parallel architectures must contend with numerous disadvantages: limited availability of programming tools, unique synchronization problems when implementing the simulation, and unexpected interactions between elements of the simulation and characteristics of the underlying computer. Since FORTRAN is likely to be available on the computer and familiar to the researcher, it may be the most logical candidate for coding the simulation. However, FORTRAN does not enforce data abstraction, a useful tool in specifying, designing, and implementing a simulation effort. FAD is a FORTRAN preprocessor which allows the encapsulation of user-defined abstract data types. Data abstraction and FAD is illustrated in the simulation of a queueing network. The separation of concerns between a simulation expert ("the user") and an expert in exploiting a parallel architecture ("the implementor") has benefits for both.
Starting Page	333
Ending Page	338
File Size	630817
Page Count	6
File Format	PDF
ISBN	0911801421
DOI	10.1109/WSC.1988.716182
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-12-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computational modeling Computer simulation Parallel programming Parallel architectures Programming profession Concurrent computing Algorithms Libraries Computer languages Utility programs
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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