NDLI: RF power potential of 45 nm CMOS technology

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RF power potential of 45 nm CMOS technology

Content Provider	IEEE Xplore Digital Library
Author	Gogineni, U. del Alamo, J.A. Putnam, C.
Copyright Year	2010
Description	Author affiliation: IBM Microelectronics, Essex Jct, VT, USA (Putnam, C.) \|\| Massachusetts Institute of Technology, Cambridge, USA (Gogineni, U.; del Alamo, J.A.)
Abstract	This paper presents the first measurements of the RF power performance of 45 nm CMOS devices with varying device widths and layouts. We find that 45 nm CMOS can deliver a peak output power density of around 140 mW/mm with a peak power-added efficiency (PAE) of 70% at 1.1 V. The PAE and P decrease with increasing device width because of a decrease in the maximum oscillation frequency (f) for large width devices. The PAE also decreases with increasing frequency because of a decrease in gain as the operating frequency approaches f. The RF power performance of 45 nm devices is shown to be very similar to that of 65 nm devices.
Starting Page	204
Ending Page	207
File Size	264849
Page Count	4
File Format	PDF
ISBN	9781424454563
e-ISBN	9781424454594
DOI	10.1109/SMIC.2010.5422960
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-01-11
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS technology Radio frequency Fingers Power measurement Scattering parameters Power amplifiers Integrated circuit technology Noise measurement Geometry Silicon
Content Type	Text
Resource Type	Article

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