NDLI: Generic megafunctions for high performance processing on FPGAs/PLDs

Content Provider	IEEE Xplore Digital Library
Author	Trainor, D.W. Ridge, D.J. Hamill, R.
Copyright Year	1996
Description	Author affiliation: Integrated Silicon Syst. Ltd., Belfast, UK (Trainor, D.W.)
Abstract	This paper examines the design issues relating to the implementation of high-performance DSP functions on FPGAs and PLDs. A challenge in implementing such systems on programmable logic is achieving the circuit performance and efficient use of hardware usually associated with ASICs. Using exemplars, we consider how an understanding of the underlying structure of both the design and the target device can result in efficient, high-performance circuits. Appreciation of the design structure also allows targeting of the design and optimisation of the implementation over a range of different programmable logic device families. This is demonstrated by considering design examples on programmable parts from Altera and Xilinx, which perform at high sampling rates for applications such as image processing, or can be implemented using very little hardware in the case of lower bandwidth applications, such as audio.
Starting Page	1047
Ending Page	1051
File Size	490237
Page Count	5
File Format	PDF
ISBN	0818676469
ISSN	10586393
DOI	10.1109/ACSSC.1996.599103
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-11-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Programmable logic devices Hardware Digital signal processing Logic devices Programmable logic arrays Logic circuits Circuit optimization Design optimization Image sampling
Content Type	Text
Resource Type	Article
Subject	Signal Processing Computer Networks and Communications

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