NDLI: CTM on multiprocessor: solution for bottleneck of SAR

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ICSP '98. 1998 Fourth International Conference on Signal Processing (Cat. No.98TH8344)

Proceedings of Third International Conference on Signal Processing (ICSP'96)

CTM on multiprocessor: solution for bottleneck of SAR

Content Provider	IEEE Xplore Digital Library
Author	Gang Ren Jizhong Han Chengde Han
Copyright Year	2000
Description	Author affiliation: Inst. of Comput. Technol., Chinese Acad of Sci., Beijing, China (Gang Ren)
Abstract	The corner turn phase, which is the real-time matrix transpose, forms the crucial memory bottleneck in the image formation process of the SAR. For the limited memory of the DSP, we cluster multiple DSPs to form a distributed memory multiprocessor system to satisfy the memory requirement in adaptive radar. In our solution, we reduce the total memory requirements by using a new structure of the corner turner matrix at first. With a Latin square as a template, the system performance is maximized. It resolves the memory bottleneck problem of the SAR image formation system with minimum additional cost.
Starting Page	1915
Ending Page	1920
File Size	500344
Page Count	6
File Format	PDF
ISBN	0780357477
DOI	10.1109/ICOSP.2000.893479
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-08-21
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Signal processing algorithms Phased arrays Digital signal processing Image coding Azimuth Synthetic aperture radar Radar imaging Image resolution Surface topography Chirp
Content Type	Text
Resource Type	Article

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