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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Das, A. Ng, J. |
| Copyright Year | 2008 |
| Description | Author affiliation: Sch. of Electr. & Comput. Eng., Univ. of California, San Diego, CA (Ng, J.) || ViaSat Inc., Carlsbad, CA (Das, A.) |
| Abstract | 32-amplitude and phase-shift-keying (32APSK) is one of the modulation schemes proposed in the 2nd generation digital video broadcasting over satellite (DVB-S2) standard. This paper presents a non-data-aided (NDA) SNR estimation scheme for 32APSK using the expectation-maximization (EM) algorithm. Two variants of the EM algorithm are presented, first with an arbitrary initialization and a second version that is initialized by modifying an existing (sub-optimal) SNR estimation technique. We demonstrate a significantly faster convergence with the latter form of initialization. We compare the performance of this estimator to the Cramer-Rao lower bound (CRLB) of NDA SNR estimation and show that the estimator performs very close to the CRLB over all SNRs of practical interest even for block sizes of 100 symbols. The estimator has also been implemented on FPGAs and we show that the fixed point implementation also performs very close to the theoretical limit. |
| Starting Page | 331 |
| Ending Page | 335 |
| File Size | 3300691 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424420452 |
| DOI | 10.1109/SPAWC.2008.4641624 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-07-06 |
| Publisher Place | Brazil |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Signal to noise ratio Estimation Field programmable gate arrays Hardware Gain Channel estimation Digital video broadcasting EM Algorithm 32APSK DVB-S2 NDA SNR Estimation |
| Content Type | Text |
| Resource Type | Article |
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