NDLI: Thermal Analysis of Memory Module Using Transient Testing Method

Content Provider	IEEE Xplore Digital Library
Author	Yan Zhang Farkas, G. Poppe, A. Manning, A. Yip, G. Mullen, D.
Copyright Year	2007
Description	Author affiliation: Flomerics Inc., Marlborough, MA (Yan Zhang; Farkas, G.; Poppe, A.; Manning, A.)
Abstract	The electrical transient testing method has become popular as a useful thermal analysis tool because of its accuracy, high repeatability and rich information content compared to the use of traditional steady state thermal characterization techniques. This paper presents a thermal study of a 16-chip memory module using transient testing. The two variables in this study are the thermal boundary conditions of and the power distribution within the module. By applying the method of network identification by deconvolution (NID) to a transient temperature measurement, the structure function can be identified, which is the dynamic thermal resistance versus capacitance along a particular heat flow path for a given boundary condition and power distribution. Comparisons of the structure functions reveal differences in the heat flow paths for the cases of one chip and multiple chips dissipating heat. Transient testing have been successfully used on a three-dimensional memory module, and determined the contributions to the overall dynamic thermal resistance by each of the components including the heat spreader (HS), socket and even thermal interface material (TIM). This information about a 3D assembly is often difficult to obtain using steady state techniques. Thermal engineers can use such information to differentiate the relative merit of materials and heat transfer mechanisms in a cooling solution to optimize the overall thermal budget.
Starting Page	7
Ending Page	11
File Size	680910
Page Count	5
File Format	PDF
ISBN	1424409586
ISSN	10652221
DOI	10.1109/STHERM.2007.352385
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-03-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transient analysis Testing Thermal resistance Steady-state Boundary conditions Power distribution Thermal engineering Information analysis Deconvolution Temperature measurement memory module Thermal transient testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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