NDLI: High Throughput AMHS Design with Dual Unified OHT System

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2011 e-Manufacturing & Design Collaboration Symposium & International Symposium on Semiconductor Manufacturing (eMDC & ISSM)

2010 International Symposium on Semiconductor Manufacturing (ISSM)

2008 International Symposium on Semiconductor Manufacturing (ISSM)

2007 International Symposium on Semiconductor Manufacturing

2006 IEEE International Symposium on Semiconductor Manufacturing

The Thirteenth International Symposium on Semiconductor Manufacturing

Welcome to ISSM 2006

Message from ISSM 2006 Executive Committee Chair

Message from ISSM 2006 Japan Program Committee Chair

ISSM 2006 Committee

ISSM 2006 Sponsoring Organizations

ISSM 2006 Sponsorship Acknowledgement

ISSM 2006 Program At a Glance

Keynote Speeches

ISSM 2006 Program Schedule

Conquering Process Variability: A Key Enabler for Profitable Manufacturing in Advanced Technology Nodes

Collaboration in the 21st Century: Driving-Innovation and Differentiation

The CASMAT Business Model for Semiconductor Materials

Toshiba's Strategy in Semiconductor Business and Production Technology

Future Lithography Challenges

The Strategy for Manufacturing Technology Advancement in Memory

Watermark induced High Density Via failures in sub micron CMOS fabrication

In Situ Particle Monitors: The Next Level of Yield Control for Critical Processes

Voltage Contrast Enhancement for Gate Leak Failure Detected by Electron Beam Inspection

Method of Minimizing Inspection Cost by Making Use of Programmed Defect Array

Failure Mode Detection and Process Optimization for 65 nm CMOS Technology

Electrical Defect Density Test Structures for DFM in the Sub-wavelength Lithography Regime with Copper Metallization

An Addressable Test Structure for Geometrical Design Rules Characterization

Sample Efficient Regression Trees (SERT) for Yield Loss Analysis

Analysis and Risk Communication of 20 Years of Exposure Monitoring of Photolithography Solvents from all Intel Fabs

Application of Atmospheric Plasma Abatement System for Exhausted Gas from MEMS Etching Process

Development of a Platform for Collaborative Engineering Data Flow between Design and Manufacturing

Risk Based Capacity Planning Method for Semiconductor Fab with Queue Time Constraints

Priority X-Factor Modeling for Differentiated Manufacturing Service Planning

300mm Time Constrained Queue Loop Management

A Dynamic Method for Optimal WIP Allocation and Control in a Semiconductor Manufacturing System

Supply Chain Inventory Control in Semiconductor Manufacturing

Cycle Time Reduction Through Preventive Maintenance De-clustering

Conveyer Belt Model to Analyze Cycle Time Conditions in a Semiconductor Manufacturing Line

Troubleshooting Tracks with Vibration Detection and Storage Technology

Increased Etch Chamber Productivity through the Reduction of Unscheduled Wet Cleans

Wire Bonder Mis-Process Reduction and Productivity Improvement with Full Automation System by Cross Regional Team

The Future of CD Metrology

Gate CD Control Considering Variation of Gate and STI Structure

New Mechanism of LER Formation in Gate Process

Development on the Highly Precise Detection System for the Abnormal Discharge at the Plasma Etching Equipment

Development of monitoring technology of ion implanter for particle detection

Device-level APC in Ion Implantation for Analog Device

Fab-wide equipment monitoring and FDC system

Using a `Z' Tool Controller for APC Applications

Improvement of photolithography process by $2^{nd}$ Generation Data Mining

Enabling Double Patterning at the 32nm Node

Highly sensitive focus monitoring on production wafer by Scatterometry Measurements for 90/65nm node devices

Laser Scattering Microhaze Correlation with Polysilicon Surface Roughness and Impact on Electrical Performance

Advanced CD Control Technology for 65-nm Node Dual Damascene Process

Novel Deep SAC Etch Process Technology for Advanced FCRAM

Low Erosion Tungsten CMP Process with High Productivity

Elimination of Vmin failures in 0.15um logic process

Impact on Latchup Immunity due to the Switch From Epitaxial to Bulk Substrate

Analog Capacitor Integration Challenges

Environmentally Friendly Single-Wafer Spin Cleaning Using Ultra-diluted HF/Nitrogen Jet Spray without Causing Structural Damage and Material Loss

A Defect-Free Anodic Oxide Passivation for LSI/FPD Vacuum Chamber

Wonderful new materials or yield killers? New metrics for metal contamination assessment

Impact on Off-state Leakage Current in PMOS Device by Metallic Contamination

High Throughput AMHS Design with Dual Unified OHT System

Requirements for AMHS in 450 mm era

A High Productivity and Low Topography W CMP Process Enabled by a Dual Endpoint System and Novel Pad Conditioning

Application of quality engineering in semiconductor wafer process

Future Trend in Packaging Technology with View from the History

Design For Business: Advancing the Business Culture of Semiconductor Back-End Manufacturing

Advanced dicing technology for semiconductor wafer -Stealth Dicing

Root Cause Mechanism for Delamination/Cracking in Stacked Die Chip Scale Packages

TFT-LCD Automated Guided Vehicle Systems Analysis Using Axiomatic Design Theory

Increased Fab Efficiency through the use of Small Lot Size FOUPs

Development of Slow Start Safety Cylinder Valve to Inhibit Adiabatic Compression for Oxidized Gases

Reduce VOC Emissions from Manufacturing Processes

Development and Practical Application of High-efficiency Fire Control System for the Clean Room

Distributive and Cooperative Scheduling Considering Multi-Attribute Product-Mix, Feedback Process, and the Dynamic Utility Control-in Resource Sharing

Framework for Event Driven Sorter Operation

Productivity Improvement by Integrated Management of Wafer Map Data

Support Vector based Demand Forecasting for Semiconductor Manufacturing

Segmented WIP Control for Cycle Time Reduction

Priority Behavior Modeling of Fab for Supply Chain Management

Time Links Management Through Real-time Dispatch System

Systemic Operation Tracking Production-progress and Control Delivery to Reach Customer Satisfaction

Integrated Production Control System in Managing Tool Uptime, Cycle-time and Capacity

Manufacturing Challenges in Double Patterning Lithography

Model Based Semiconductor Factory Automation for Rapid Factory Startup and Change

Managing Process Constraing Effectively to Enable Fab Cycle Time Reduction

Study of the relation between Loading ratio and X-Factor

A Quadratic Goal Programming Model and Sensitivity Analysis for Semiconductor Supply Chain

Parts Cost of Ownership Mechanism for Constantly Reducing Variable Cost of Equipment at Semiconductor Fabs

Nano-thickness Stellar Defects

Novel Application of Programmed Defects to Enhance 200/300mm SEM Navigation Accuracy During 65nm MirrorBit Development

Overall Wafer Effectiveness (OWE): A Novel Industry Standard for Wafer Productivity

Novel Use of Discrete SEM Inspection to Supplement and Refine Inline Defect Inspection During 65nm MirrorBit Development

Yield Methodology for Mixed Signal Process Development

The Optimization of Chamber Cleaning in the Etching Equipment

A high resolution and early triggering on multi layer processing defects

Investigation of post STI liner oxide annealing effect in 0.14μm embedded flash technology

Integrated ODP metrology as an APC enabler for complex high aspect ratio 3D deep trench device structures

Threshold Voltage Asymmetry from Unintentional Angle of Implant on 90nm Floating Gate Flash Memory Devices

Real-time monitoring of plasma flickering in high pressure electronegative discharge

APC Methodology for Cpk improvement of HDP Deposition

Low-K CMP process control by using interpolation method

Utilization of Insitu Metrology Capability of ASML Lithography Scanner to Improve Overall Process Control

Challenges of Manufacturing Capacitor Oxide in Mixed Signal ASICS

Real-time Monitoring of Photoresist Thickness Contour in Microlithography

Using product test data for manufacturing process control

Samsung Equivalence Test for Output Parameters in Semiconductor Manufacturing

ISMI Victory: Interface A Ready for Manufacturing

Yield enhancement/Productivity improvement for Sub-110nm Memory Lithography using new alignment strategy

A Technique for Co Target Discharge Stabilization Using an Ion Gauge in the Sputtering System

The ROI of Metrology

Advantage of Siconi Preclean over Wet Clean for Pre Salicide Applications Beyond 65nm Node

Improved CVD-Al Thin Film Using Superior Al Precursor

Endpoint Detection of Dry Cleaning on LPCVD poly-Si Process

Use of Vertical Scanning Interferometry to Optimize HDP Oxide Thickness for STI CMP

Reliable High Volt Mixed Signal IC Manufacturing

Development of SiN ESL for Cu BEOL of Advanced Flash Memory Devices

A New Air Cleaning and Cooling Instrument Using Oblique Honeycomb

New QCM Sensor for Real-time AMC Detection in SMIF Pods

The Static Elimination System with Soft X-ray Air Ionizer Used in ULSI Cleanroom

Inline VPD-TXRF for Contamination Control: Reality or Myth? Experience in a 300mm R&D MirrorBit Flash Memory Fab

The wafer preparation technology with nano size particle contamination by using single spin processor

Thin-Gate CMOS and Super-Thick Gate DECMOS Integration in 0° On-axis ≪100≫ Starting Wafer: Process Challenges and Solutions

Investigation on Metal Pillar Defect in sub-micron CMOS Technology

A Criterion for Applying Countermeasure to the Electrostatic Charging Issue of Wafer Probers

Method for Fast and Accurate Calibration of Litho Simulator for Hot Spot Analysis

Optical Solution of Advanced Production Control for Ultrathin Nitrided Gate Oxides

Recipe-independent Tool Health Indicator and Fault Prognosis

Non-Destructive Monitoring of Silicon Consumption During Shallow Trench Isolation Formation on 45nm Node Devices Using Spectroscopic Ellipsometry

Using `Locked Wafers' to Prioritize Factory Resources

Evolutionary Engineering Collaboration for DFM/DFY Solutions between Foundry and EDA Tool Vendor

DFM Challenges for 32nm Node with Double Dipole Lithography (DDL) and Double Patterning Technology (DPT)

Business Model Innovation with Effective Innovation: An Exploratory Study on TSMC

Approach for a Standardized Methodology for Multi-Site Processing of 300mm Wafers at R&D-Sites

Managing Dynamic Events in Full-Load States of Semiconductor Manufacturing Chains

Monitor Cost Reduction Through Application of Activity Based Costing

ISSM 2006 Program Schedule

ISSM 2005, IEEE International Symposium on Semiconductor Manufacturing, 2005.

2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)

Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)

1999 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings (Cat No.99CH36314)

1997 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings (Cat. No.97CH36023)

Proceedings of International Symposium on Semiconductor Manufacturing

International Symposium on Semiconductor Manufacturing, Extended Abstracts of ISSM

International Symposium on Semiconductor Manufacturing

High Throughput AMHS Design with Dual Unified OHT System

Content Provider	IEEE Xplore Digital Library
Author	ChungSoo Han Pare, K. Tokumoto, M. Aoki, A.
Copyright Year	2006
Description	Author affiliation: Spansion LLC, Austin (ChungSoo Han; Pare, K.)
Abstract	The high throughput automated material handling system (AMHS) is required to support carrier delivery requirement of 300 mm prime and 450 mm wafer fab. The unified overhead hoisting transport (OHT) system has been used for 300 mm fab to get high throughput and short delivery time; however, it has throughput limitations because of vehicle traffic congestion, especially in the interbay area. This paper describes the dual unified OHT (DUO) system, a new track layout system to reduce interbay congestion and improve delivery throughput. A simulation result is included to compare the throughput performance of the DUO and single unified OHT (SUO) system.
Starting Page	185
Ending Page	188
File Size	3308740
Page Count	4
File Format	PDF
ISBN	9784990413804
ISSN	1523553X
DOI	10.1109/ISSM.2006.4493056
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-09-25
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	ISSM
Subject Keyword	Throughput Machinery Materials handling Buffer storage Metrology Traffic control Design automation Magnetic heads Vehicle dynamics Dispatching
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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