NDLI: On the use of wafer positional and spatial pattern analysis to identify process marginality and to de-convolute counterintuitive experimental results

Content Provider	IEEE Xplore Digital Library
Author	Klein, G. Kohler, L. Wiseman, J. Dunham, B. Anh-Thu Tran Brown, S. Shingo, M. Burki, I.
Copyright Year	2007
Description	Author affiliation: Spansion LLC, Austin (Klein, G.; Kohler, L.; Wiseman, J.; Dunham, B.; Anh-Thu Tran; Brown, S.)
Abstract	The use of wafer randomization and positional analysis in manufacturing is ubiquitous and well established. Wafer electrical and yield data can be traced back to specific operations in the manufacturing process with the help of wafer sequencing records. Tight process windows or complex process technologies may however require that the statistical parameter versus sequence signal be combined with other variables including parameter spatial distribution on wafer, batch loading sequence, and an intimate knowledge of the process tool itself. In this paper case studies are presented to demonstrate how the above were combined to optimize the robustness of an especially critical gate oxidation process module. Finally possible enhancements to analysis techniques are discussed.
Starting Page	1
Ending Page	5
File Size	1255162
Page Count	5
File Format	PDF
ISBN	9781424411412
ISSN	1523553X
DOI	10.1109/ISSM.2007.4446839
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-15
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Pattern analysis Resists Silicon Circuit testing Lead compounds Manufacturing processes Signal processing Flash memory Power supplies Strips
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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