NDLI: Current limitation control technique for parallel operation of UPS inverters

Content Provider	IEEE Xplore Digital Library
Author	Chiang, S.J. Lin, C.H. Yen, C.Y.
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. Eng., Nat. United Univ., Miao-Li, Taiwan (Chiang, S.J.; Lin, C.H.; Yen, C.Y.)
Abstract	This work presents a current limitation control technique for multimodule parallel UPS inverters. All inverter modules are with voltage and current control loops. However, only the voltage loop of the master module is active. The current command of the master module is generated by its voltage controller. Voltage loops of all slave modules are idle running. The slave module is only for sharing load current with its current command generated from the previous module. By limiting the output current command of each module and sending the difference between the limited and unlimited current commands to the next module, each module only has to share the load current not completely provided by all previous modules. Through circular chain connection of the modules, the number of control interconnection can be minimized. The master module also can be switched on-line with negligible disturbance for voltage regulation. Due to only one voltage loop is active at any time, the proposed method is the most stable one as compared with other methods with control interconnection. This paper also proposes a robust controller for maintaining good voltage regulating performance even when the parallel number of modules has a large change. Three 1 KVA modules are implemented. The effectiveness of the proposed technique is confirmed with experimental results.
Sponsorship	IEEE Power Electon. Soc
Starting Page	1922
Ending Page	1926
File Size	343831
Page Count	5
File Format	PDF
ISBN	0780383990
ISSN	02759306
DOI	10.1109/PESC.2004.1355411
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-06-20
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Uninterruptible power systems Inverters Voltage control Inductors Current control Power system harmonics Impedance Stability Robust control Maintenance
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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