NDLI: Static and noise characterization of deep submicron CMOS devices

Content Provider	IEEE Xplore Digital Library
Author	Zimmermann, J. Ghibaudo, G.
Copyright Year	1990
Description	Author affiliation: Lab. de Phys. des Composants a Semicond., ENSERG, Grenoble, France (Zimmermann, J.; Ghibaudo, G.)
Abstract	Today, 0.35 /spl mu/m CMOS technologies have been brought up to integrated circuit mass production. The trend for the next two years is to implement the forthcoming 0.25 /spl mu/m CMOS and the 0.18 /spl mu/m CMOS technologies. Thus deep submicron CMOS is a reality from the standpoint of the CMOS IC market as a very well mastered device. Nevertheless, this device still is an object of interest for applied physicists and engineers since new and interesting phenomena show up (e.g. random telegraph signal or RTS), that are believed to be at the source of enhanced excess noises commonly observed in them. Due to the importance played by noise in analogue circuits applications, specific noise studies have been made of these devices. The present paper provides a summary of the actual knowledge on this topic.
Starting Page	521
Ending Page	529
File Size	685926
Page Count	9
File Format	PDF
ISBN	0780326474
DOI	10.1109/SMICND.1995.495074
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-10-11
Publisher Place	Romania
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fluctuations Low-frequency noise Electronic switching systems Electron beams Lithography MOSFETs Threshold voltage Measurement standards Rain Vents
Content Type	Text
Resource Type	Article

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