NDLI: Simulation of planar I/F networks with delayed connections

Content Provider	IEEE Xplore Digital Library
Author	Maida, A.S. Rowland, B.A. Gunay, C.
Copyright Year	2001
Description	Author affiliation: Center for Adv. Comput. Studies, Univ. of Louisiana at Lafayette, Lafayette, LA, USA (Maida, A.S.)
Abstract	Studies the synchronization characteristics of a locally connected, planar network of (leaky) integrate-and-fire (I/F) neurons after Hopfield and Hertz (1995). Simulations were conducted using both the Java programming language and the MatLab prototyping language in order to detect implementation errors. Further, two different algorithms were used in the simulations. The first method was a standard numerical simulation using Runge Kutta methods. The second method was an event-driven algorithm generalized from Campbell et el. (1999). Both algorithms yield the same results. Visualizations were included to make qualitative behaviors visually apparent. We replicated the original Hopfield et al. simulation results in which periodic synchronous firing emerged. The Java software displays the activation level of each unit in the planar grid in real time. The software also displays the number of units firing per time step. Since the software runs in real time, the user can observe a movie of the network evolution simply by running the simulation. The main result obtained is that when small delays are introduced, synchronized firing takes the form of a traveling wave across the grid. When axon transmission was instantaneous, it was possible to achieve complete synchrony, but when small delays were introduced the largest amount of synchrony possible as less than 10 percent. With larger delays, the synchrony disappears entirely.
Sponsorship	Int. Neural Network Soc.
Starting Page	302
Ending Page	307
File Size	675737
Page Count	6
File Format	PDF
ISBN	0780370449
ISSN	10987576
DOI	10.1109/IJCNN.2001.939036
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-07-15
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Java Displays Neurons Computer languages Virtual prototyping Numerical simulation Visualization Motion pictures Propagation delay Nerve fibers
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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